ETPU - Shifting for ERBA

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ETPU - Shifting for ERBA

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mertk
Contributor IV

Hi,

What is the purpose of the below code and how it works? I mean, why we are shifting the address 9 bit?

I couldn't figure out by reading the datasheet. The datasheet says it can described in eTPU Reference Manuel, however I couldn't find or figure out where it is describing it.

eTPU->ECR_A.B.ERBA = ((uint32_t)fs_free_param) >> 9;

I am looking forward to your answers. 

Best regards,

Mert KİREMİTCİ.

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johndiener
Contributor IV

Engine Relative memory can only be configured to be on 512-byte boundaries, hence the shift by 9 bits to go from a byte address to a 512-byte block address.  However, without other context it is hard to tell if that line of code is otherwise correct (i.e. not accidently overlaying the engine relative data area on top of other allocations).  In any case, the ERBA settings only apply if the eTPU code makes use of the engine-relative memory space.

John Diener

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mertk
Contributor IV

Hi @johndiener,

How do you know the

Engine Relative memory can only be configured to be on 512-byte boundaries

from the datasheet? Do you understand from below note where it is located page 28-8 in MPC5674FRM?

channel-bound data address space of up to 128 32-bit parameters (512 bytes)

I am looking forward to hearing from you.

Best regards,

Mert. 

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mertk
Contributor IV

Hi @johndiener,

The code is taken from the fs_etpu2_init function of AN4907. Thanks for your help. 

Here is the full code for who read this topic and needs to further understanding.

 

uint32_t fs_etpu2_init(
  struct etpu_config_t p_etpu_config,
  uint32_t engine_mem_size)
{
  /* 1. Initialize Watchdog Timer. */
  /* Engine A Watchdog */
  eTPU->WDTR_A.R = 0; /* disable first before a new mode is configured */
  eTPU->WDTR_A.R = p_etpu_config.wdtr_a;

  /* Engine B Watchdog */
  /* Not all parts have a second eTPU engine, if don't these writes are ignored. */
  eTPU->WDTR_B.R = 0; /* disable first before a new mode is configured */
  eTPU->WDTR_B.R = p_etpu_config.wdtr_b;

  /* 2. Allocate engine-relative data memory space for each engine. */
  if(engine_mem_size > 0)
  {
    /* Engine A */
    if(eTPU->ECR_A.B.MDIS == 0)
    {
      fs_free_param = (uint32_t*)((((uint32_t)fs_free_param+511)>>9)<<9); /* round up to 512s */
      eTPU->ECR_A.B.ERBA = ((uint32_t)fs_free_param) >> 9;
      fs_memset32(fs_free_param, 0, engine_mem_size);
      fs_free_param = (uint32_t*)((uint32_t)fs_free_param + engine_mem_size);
    }
    /* Engine B */
    if(eTPU->ECR_B.B.MDIS == 0)
    {
      fs_free_param = (uint32_t*)((((uint32_t)fs_free_param+511)>>9)<<9); /* round up to 512s */
      eTPU->ECR_B.B.ERBA = ((uint32_t)fs_free_param) >> 9;
      fs_memset32(fs_free_param, 0, engine_mem_size);
      fs_free_param = (uint32_t*)((uint32_t)fs_free_param + engine_mem_size);
    }
  }
  fs_free_param = (uint32_t*)((((uint32_t)fs_free_param + 7) >> 3) << 3); /* round up to 8s */

  if ((uint32_t)fs_free_param > fs_etpu_data_ram_end)
    return(FS_ETPU_ERROR_MALLOC);
  else
    return(0);
}

 

 

Best Regards,

Mert.

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johndiener
Contributor IV

Engine Relative memory can only be configured to be on 512-byte boundaries, hence the shift by 9 bits to go from a byte address to a 512-byte block address.  However, without other context it is hard to tell if that line of code is otherwise correct (i.e. not accidently overlaying the engine relative data area on top of other allocations).  In any case, the ERBA settings only apply if the eTPU code makes use of the engine-relative memory space.

John Diener
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mertk
Contributor IV

Hi @johndiener,

Do you have any idea? 

Best regards,

Mert.

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