EQADC RFIFO PROBLEM on MPC5777C

cancel
Showing results for 
Search instead for 
Did you mean: 

EQADC RFIFO PROBLEM on MPC5777C

176 Views
berat24
Contributor III

Hello everyone;

I have a trouble about receiving data from RFIFO(0).

Firstly, I have one ADC input and so I have arranged just one channel on ADC. I am using streaming mode and I am triggerring my conversion command by PIT on each 500 ms.

I have set relevant bits to receive interrupt when at least one data is in RFIFO(0) and I retrieve data from RFIFO to my buffer on each relevant interrupt showing RFIFO has valid entry.

My problem is that after third interrupt, My RFIFO is full and I receive four different datas. I supposed that datas I have read do not leave RFIFO.

There is two photos below. One of them is about my buffer and another is RFIFO drain interrupt ISR function where I read data.

What can be reason for that?

I am looking forward to hearing your responds.

Sincerely.

 

1.PNG2.PNG

0 Kudos
4 Replies

158 Views
davidtosenovjan
NXP TechSupport
NXP TechSupport

Hi, you should read just one result in the ISR and clear FISR[RFDF] flag in the ISR.

0 Kudos

167 Views
berat24
Contributor III

When I was in debug mode, I examined each register and RFIFO(0). From  my point of view, data in RFIFO(0) does not disappear even if we read it. 

However, according to reference manuel, data in RFIFO(s) disappear after reading it.

Could you explain this point for me also?

 

0 Kudos

165 Views
berat24
Contributor III

Another option is that if I read RFIFO continuously, I see the last value in the RFIFO relevant index.

 

 

0 Kudos

164 Views
berat24
Contributor III

When the EQADC RFIFO Pop Register x is read and RFIFOx is empty, EQADC will not
decrement the counter value and the POP Next Data Pointer x will not be updated. The
read value will be undefined.

I think, answer is above. I have copied it from reference manuel.

0 Kudos