Disabling BDM/JTAG Development Port in Firmware on MPC561 (PowerPC Architecture)

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Disabling BDM/JTAG Development Port in Firmware on MPC561 (PowerPC Architecture)

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imsujith3
Contributor II

Hello,

I am working with the MPC561 microcontroller, based on the PowerPC architecture, and I need to disable the development ports (BDM/JTAG) through firmware, rather than by using hardware methods. I want to ensure that these debug interfaces are not accessible after the firmware is loaded.

Could anyone provide guidance on how to disable BDM/JTAG in firmware? Are there any specific registers or settings that I need to configure? Any insights or references to documentation on this topic would be greatly appreciated.

Thanks in advance!

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davidtosenovjan
NXP TechSupport
NXP TechSupport

Unfortunately this is outdated product and Not Recommended for New Designs. We do not have any resource who could dealt with this issue.

I'm sorry for the trouble this may cause you, but I can't help you in a better way. Thanks for understanding.

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