Hi Peter
First, thanks for your reply. There are some more questions about the IMCR register.
| pad_53 | pd[5] | w11 | 53 | 0 | siul | gpio[53] | i/o | General purpose IO 53 |
| | | | | 1 | dspi0 | cs3 | o | DSPI 0 chip select 3 |
| | | | | 2 | etimer0 | etc0 | i/o | Etimer 0 timer channel 0 |
| | | | | 3 | | | | |
| | | | | 4 | | | | |
| | | | | - | | | | |
| | | | | - | | | | |
| | | | | - | enet_macahb | rx_d0 | i | ENET receive data D0 |
| | | | | - | flexpwm0 | fault[2] | i | FlexPWM 0 fault input 2 |
| | | | | - | | | | |
How could I configure the enet_macahb_rx_d0 and rx_er .etc. I can't find the corresponding IMCR register unlike rxdv(IMCR90). The IMCR registers only have 93 in MPC577xK_Muxing_BallMap_Rev2_15.xlsx.
However, in Martin's MPC577xK_ENET_Example:
/* RX_ER */
/*
SIUL2.MSCR[11].B.SSS = 0;
SIUL2.MSCR[11].B.IBE = 1;
SIUL2.MSCR[11].B.PUE = 1;
SIUL2.IMCR[967].B.SSS = 1;
*/
The IMCR number is 967 or as mentioned in
https://community.nxp.com/message/943047?commentID=943047&et=watches.email.thread#comment-943047
the number is 967-512=455

But the question is that I do not have the information about IMCR numbers over 93. Where could I find them?
Regards
Hai