Clear Pending Interrupt on Controller Level

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Clear Pending Interrupt on Controller Level

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martinschulthei
Contributor III

Hi Community,

 

is it possible to clear a pending interrupt on the interrupt controller of mpc57xx family derivatives (e.g. MPC5775K) ?

Background: Global EE Flag is disabled, external peripheral interrupt occurs but should not be handled. Instead there is a API call like ClearPending(SourceNumber), which should asure, that the interrupt is ignored by the controller.

 

Thanks in advance.

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martinschulthei
Contributor III

Hi,

first, thanks for your answer, i think this would work for one interrupt occurrence. But in my case, i have to assure, that only a specific pending interrupt is cleared, not any. This is why i want to use the interrupt source number as argument. Background: The API should be used as OS internal service. But i'm not sure if this is possible for PPC derivatives.

Regards

Martin

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martin_kovar
NXP Employee
NXP Employee

Hi Martin,

I had investigated your use case little bit deeper and I think it will be possible to create the function you need. INTC handles only one interrupt at a time. Other interrupts are not "saved" to INTC, but only their flags in peripheral registers signalize to INTC there are some "active" interrupts which should be handled. So if you clear this interrupt flags in peripheral registers, interrupts will not be handled.

Test case(which I tested on MPC5775K board):

Lets say you have configured 2 PIT channels. First channel has period 1 second, second channel has period 1.1 second. You have disabled EE bit and both TIF flags are set. Now, if you clear both TIF flags and enable EE bit, only one interrupt will be triggered. It will be the interrupt which is triggered first, after EE bit was disabled. In this scenario it is PIT first channel interrupt. Second interrupt will not be handled after next period.

I hope it helps you little bit and if you have any other questions, please feel free to write me back.

Regards,

Martin

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martinschulthei
Contributor III

Hi Martin,

thanks a lot for your help. The information about the interrupt saving was very helpful ("Other interrupts are not "saved" to INTC,...")

Regards

Martin

1,199 Views
martin_kovar
NXP Employee
NXP Employee

Hi,

I have a idea, but I am not sure, if it is completely correct process.

Background:

- you have disabled ee bit and interrupt from some peripheral was reached (interrupt was not executed, but pending in INTC)

You can do following:

- you have to clear interrupt bit in peripheral register

- read IACKR register in INTC (reading the INTC_IACKR negates the interrupt request to the associated processor.)

- eventually edit current priority

- enable ee bit

Please try and let me know, if it is suitable for you.

Regards,

Martin

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