CMU interrupt in MPC5744

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CMU interrupt in MPC5744

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riyazshaik
Contributor II

I am using MPC5744 in my project, I have a query regarding CMU, I want to use clock monitoring interrupt with source ID 497 but in refrence manual it says reserved. Can i use this vector interrupt

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petervlna
NXP TechSupport
NXP TechSupport

Hi,

This doesn't make sense at all to me.

1. You cannot serve interrupt when you have clock violation as you don't know which clock is used for INTC module and also for ISR code execution. This is not safe at all.

2.Register CMU Interrupt Status Register should be called only status register. I have reported this to documentation team.

pastedImage_1.png

3. CMU module is not rooted into INTC module. So there is no point to even talk about Interrupt 479 in INTC.

4. CMU is rooted into FCCU. When threshold violation occurs you have to react on it in FCCU. With reset, interrupt, or so. This is the correct safe way.

5. I do not agree with AUTOSAR integration manual. I have reported it to AUTOSAR team.

Peter

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4,994 Views
petervlna
NXP TechSupport
NXP TechSupport

Hi,

You are using obsolete integration guide for MCAL according to our MCAL expert.

Please make sure you are following MCAL integration guide 2.0.1 where the table is correct.

Peter

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riyazshaik
Contributor II

Hello Peter,

Thanks for the update.

Now I am trying to configure the FCCU to handle CMU error.

I have updated the code using the functions

I have disabled the SWT by using following lines:

SWT_0_SR = 0x0000C520ul;

SWT_0_SR = 0x0000D928ul;

SWT_0_CR = 0x8000010Aul; /* Disable SWT */

And called the following functions as per application notes:

void FCCU_clear_faults(void);

void FCCU_CONFIG (void);

What I observe from with debugger or without debugger

The code always stays in the following line

FCCU.TRANS_LOCK.R = 0xBC;

FCCU.CTRLK.R = 0x913756AF; //key for OP1

FCCU.CTRL.R = 0x1; //set OP1 - set up FCCU into the CONFIG

/* wait for successful state transition */

while (FCCU.CTRL.B.OPS != 0x3); //operation status succesful

Here is snipet of SWT register

Can you please suggest what could be the reason that OPS bit is always aborted?

Thank you in advance.

Best Regards

Riyaz

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petervlna
NXP TechSupport
NXP TechSupport

Hi,

Your FCCU CONFIG state transition was rejected due to pending fault in FCCU NCFS register.

Before asking mode change verify if the faults are cleared. You are only clearing them and not checking if faults was cleared.

Peter

4,995 Views
petervlna
NXP TechSupport
NXP TechSupport

Hi,

This doesn't make sense at all to me.

1. You cannot serve interrupt when you have clock violation as you don't know which clock is used for INTC module and also for ISR code execution. This is not safe at all.

2.Register CMU Interrupt Status Register should be called only status register. I have reported this to documentation team.

pastedImage_1.png

3. CMU module is not rooted into INTC module. So there is no point to even talk about Interrupt 479 in INTC.

4. CMU is rooted into FCCU. When threshold violation occurs you have to react on it in FCCU. With reset, interrupt, or so. This is the correct safe way.

5. I do not agree with AUTOSAR integration manual. I have reported it to AUTOSAR team.

Peter

4,994 Views
petervlna
NXP TechSupport
NXP TechSupport

Hi,

I'm quite confused of your description. As 497 is ADC_ER interrupt.

pastedImage_1.png

CMU do not have direct interrupt rooting into INTC module. As you can see from 7.4.6.2 Interrupt vector assignments table in reference manual.

If there is CMU threshold violation it reports to FCCU. In FCCU you have to decide what action you will take:

1. interrupt

2. nothing

3. reset (short/long)

Have a closer look at FCCU chapter to understand how micro behave when CMU thresholds are violated.

Peter

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riyazshaik
Contributor II

Capture.PNG

It was a typo error its actually 479

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petervlna
NXP TechSupport
NXP TechSupport

Ok,

But answer is still the same.

Peter

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riyazshaik
Contributor II

okay. Then i want to understand  why there is a Interrupt vector assignments with 479 and what does Reserved means?

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petervlna
NXP TechSupport
NXP TechSupport

Sorry, I do not understand you.

Reserved means that this vector is reserved and it is not used on this device as the INTC is common periphery for more MPC57xx.

Peter

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riyazshaik
Contributor II

We are using MPC5744 in our project. We got an MCAL software from NXP(MPC574XP_MCAL4_0_RTM_2_0_0)

We want to use the CMU module to monitor different clocks.

For instance: we are using CMU 01 to monitor system clock, for this we have defined the higher and lower threshold

We could also see for any violation in clock the interrupt bit is getting set.

Now we want to handle this interrupt. In Reference manual the vector assignment of CMU interrupt is given as reserved as shown:

If 479 is reserved then how we configure this ISR as per integration manual from NXP

When I am referencing this interrupt in my OS as per integration manual from NXP. There is an exception getting generated.

Integration manual:

Best Regards

Riyaz

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