CAN-FD 64 bytes on MPC5748G

[Kazarian]

Hello, 

The application is a simple CAN-FD echo , when the MCU receive a CANFD message it will send it back with an incremented ID, for example CAN case send ID  0x155 data 0x1 0x2 0x3.. the MCU will reply back with 0x156 0x1 0x2 0x3..

im facing an issue during the first power up of the board, the MCU will reply with correct fram  only after the 3rd request, the first 2 requests it will reply with an incorrect lenght and ID, although the MB view seems to have the correct data (image MBView.png)

Attached the code used, please review it and let us know where the problem may come from.

Thank you

[PetrS]

Hi Kazarian,

this looks weird indeed, probably you have wrong identification of MB index and address used, or similar. I can recommend to step through the code after message is received to be sure proper pointers will be used.
Do not use reading MB CS word to check for new message. MB can be locked inadventirelly. 
Simply check MB flag and then read respective MB area.
You can refer to below example for that
https://community.nxp.com/t5/MPC5xxx-Knowledge-Base/Example-MPC5748G-FlexCAN-FD-TX-RX-S32DS2-1/ta-p/...
Hope it helps.

BR, Petr

[Kazarian]

Thanks @PetrS this works:

I have 2 variant of CPU one is 0N78S this works fine both Standard CAN and CANFD, but the other one 1N81M does not work on FD mode ? do you know what was changed between the 2 silicons ?

This is my init function

AbstractCANTransceiver::ErrorCode FlexCANDevice::initCANFD()
{
    /* enable the FlexCAN module, reset and freeze */
	fpDevice->MCR.R = (0
					| CAN_MCR_FRZ  		/* enabled to enter Freeze mode */ 
					| CAN_MCR_HALT 		/* enter freeze mode if FRZ bit is set */
					//| CAN_MCR_SOFTRST /* soft reset */
					//| CAN_MCR_SRXDIS  /* self reception enable */
					| CAN_MCR_BCC  		/* individual Rx masking and queue */
					| 0x0000003F);                      
	
	/* double check that we are actually in freeze mode */
	while(0 == fpDevice->MCR.B.FRZACK) {};
	while(0 == fpDevice->MCR.B.NOTRDY) {};
	
	fpDevice->MCR.R = (0
					| CAN_MCR_FRZ  		/* enabled to enter Freeze mode */ 
					| CAN_MCR_HALT		/* enter freeze mode if FRZ bit is set */                    
					| CAN_MCR_SRXDIS  	/* self reception disabled */
					| CAN_MCR_BCC  		/* individual Rx masking and queue */
					| CAN_MCR_AEN  		/* Safe Tx abort enable */
					| CAN_MCR_FDEN 		/* CAN FD enabled */
					| 0x0000003F); 		/* enable 64 MBs */  

	// Set CAN Bit Timing Register (CAN_CBT. P-1747)
	fpDevice->CBT.B.BTF 	 = 1; 		// Enable extended bit time definitions
	fpDevice->CBT.B.EPRESDIV =	fConfig.bitrate_cbt.presDiv;
	fpDevice->CBT.B.ERJW 	 =  fConfig.bitrate_cbt.rjw;  
	fpDevice->CBT.B.EPROPSEG =  fConfig.bitrate_cbt.propSeg;	 
	fpDevice->CBT.B.EPSEG1   =  fConfig.bitrate_cbt.pSeg1;  
	fpDevice->CBT.B.EPSEG2   =  fConfig.bitrate_cbt.pSeg2; 

	// Set CAN FD Bit Timing register (CAN_FDCBT. P-1768)
	fpDevice->FDCBT.B.FPRESDIV = fConfig.bitrate.presDiv;
	fpDevice->FDCBT.B.FRJW     = fConfig.bitrate.rjw;
	fpDevice->FDCBT.B.FPROPSEG = fConfig.bitrate.propSeg;
	fpDevice->FDCBT.B.FPSEG1   = fConfig.bitrate.pSeg1;
	fpDevice->FDCBT.B.FPSEG2   = fConfig.bitrate.pSeg2;
	
	// Set CAN FD Control register (CAN_FDCTRL .P-1766)
	fpDevice->FDCTRL.R = 0;
	fpDevice->FDCTRL.B.FDRATE = 1;   			  // bit rate switching enable
	fpDevice->FDCTRL.B.TDCEN = 0;
	//fpDevice->FDCTRL.B.TDCOFF = 32;
	fpDevice->FDCTRL.B.MBDSR0 = fConfig.payload;
	fpDevice->FDCTRL.B.MBDSR1 = fConfig.payload;
	fpDevice->FDCTRL.B.MBDSR2 = fConfig.payload;

	// Enable CAN ISO
	fpDevice->CTRL2.B.ISOCANFDEN = 1;

	/* Inactivate all message buffers */
	for (uint8_t i=0; i<96; i++) {      	
		//fpDevice->MB[i].CS.B.CODE = CANRxBuffer::CODE_INACTIVE;  
		setupMessageBuffer(i, CANRxBuffer::CODE_INACTIVE, false);
	}

    return AbstractCANTransceiver::CAN_ERR_OK;
}

Regards. 

[PetrS · Accepted solution]

Hi,

1N81M is still using older CAN FD protocol, see errata e8756 FlexCAN: FD frame format not compliant to the new ISO/CD 11898-1:2014-12-11

BR, Petr