Burst memory accesses in MPC55xx/e200z6

[ricardofranca]

Hello,

Although I am thinking about the MPC5554, I suppose my (beginner's!) question should apply to other microcontroller/microprocessor models that can perform burst accesses to external memories.

When I access external memory in burst mode, does the processor wait the whole burst to finish (e.g. 3+1+1+1 cycles) before using the retrieved data or it continues executing instructions as soon as the data that was actually meant to be loaded is read?

Thanks!

[ricardofranca]

Robert,
Thanks for your answers, they were very helpful!

Best regards,
Ricardo

[robert_carter · Accepted solution]

Ricardo,

Good question. Devices like the MPC5554 which have a bursting bus interface don't have to wait until all of the data beats are received from the external memory. The CPU will try to make us of the information as it becomes available from the external device.  In general, if you are bursting instructions from external memory, you should be sure to have cache enabled so any retrieved instructions that are needed again soon will curl up in cache and be ready for use again without having to go back out to external memory. You should pay careful attention to external memory wait state settings and configure those for the fewest number of wait states that are possible at the clock frequency you are using. Finally, the MPC5554 is a fine device, but you might consider a slightly newer device such as MPC5644A or MPC5674F depending on your exact system needs. They are a generation newer technology and have somewhat better performance.