A Critical Input Exception is signalled to the processor by the assertion of the critical interrupt pin.
Causing condition for Critical Input Exception : p_critint_b is asserted and MSRCE = 1.
In manual register settings are mentioned, to get critical interrupt, but for some of the registers we dont have write access.
So we are not able to check our implementation for critical input exception.
Please let us know how can we test this functionality through software.
Hi Anuja,
I did quick test on my board and to get critical interrupt I did:
- set MSR[CE] = 1
- enable input buffer on NMI pin PA1: SIUL2.MSCR[1].B.IBE = 0x1;
- configure NCR register in Wake up unit:
- set NDSS0 to 01, so critical interrupt is triggered
- set NREE0 to enable rising edge (or NFEE0 if you want to trigger interrupt on falling edge)
- set NFE0 if you want to enable input filter
I used MPC5748G EVB where the PA1 pin is connected to SW3. If I push the button, rising edge appears on the pin and I can see that critical interrupt is triggered. It will jump to address IVPR+0x0.
Regards,
Lukas
Hi Lukas,
In your comment, u have mentioned as "If I push the button, rising edge appears on the pin and I can see that critical interrupt is triggered", Is this push button is connected to PA pin on MPC5748G controller board?
Regards,
Anuja
Hi Anuja,
I used this board:
As you can see in this schematic:
http://www.nxp.com/assets/downloads/data/en/schematics/X-MPC574XG-MB_SCH.pdf
... the PA1 is connected to push button:
Regards,
Lukas
Hi Lukas,
It's working fine now.
Thanks for all your support.
Regards,
Anuja
Hi,
which device is it?
Regards,
Lukas