5748G muliti core problem

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5748G muliti core problem

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375456197
Contributor I

我在调试5748G到多核应用时,只要开启Z4B,CAN就无法正常使用,有没有人遇到类似到情况?

开启Z4B的代码如下:

void hw_init(void)
{

#if 1

//defined(DEBUG_SECONDARY_CORES)
uint32_t mctl = MC_ME.MCTL.R;

#if defined(TURN_ON_CPU1)
//MC_ME.CCTL[2].R = 0x00FE; // enable core 1 in all modes
MC_ME.CCTL[2].R = 0x0018; //Core1(Z4)控制寄存器,控制Core1在DRUN、RUN0模式下工作,参考MC_ME_CCTL

#if defined(START_FROM_FLASH)
MC_ME.CADDR[2].R = 0x11d0000 | 0x0; //设置Core1(Z4)的Flash起始地址,并且在模式转换时产生复位
//MC_ME.CADDR[2].R = 0x11d0000 | 0x0; //设置Core1(Z4)的Flash起始地址,并且在模式转换时不产生复位
#else
MC_ME.CADDR[2].R = 0x40040000 | 0x1;//设置Core1(Z4)的Flash起始地址,并且在模式转换时产生复位
//MC_ME.CADDR[2].R = 0x40040000 | 0x0;//设置Core1(Z4)的Flash起始地址,并且在模式转换时不产生复位
#endif /* defined(START_FROM_FLASH) */

#endif //defined(TURN_ON_CPU1)

#if defined(TURN_ON_CPU2)
//MC_ME.CCTL[3].R = 0x00FE;// enable core 2 in all modes
MC_ME.CCTL[3].R = 0x0018; //Core2(Z2)控制寄存器,控制Core2在DRUN、RUN0模式下工作,参考MC_ME_CCTL

#if defined(START_FROM_FLASH)
MC_ME.CADDR[3].R = 0x13a0000 | 0x0; //设置Core2(Z2)的Flash起始地址,并且在模式转换时产生复位
//MC_ME.CADDR[3].R = 0x13a0000 | 0x0; //设置Core2(Z2)的Flash起始地址,并且在模式转换时不产生复位
#else
MC_ME.CADDR[3].R = 0x40080000 | 0x1; //设置Core2(Z2)的Flash起始地址,并且在模式转换时产生复位
// MC_ME.CADDR[3].R = 0x40080000 | 0x0; //设置Core2(Z2)的Flash起始地址,并且在模式转换时不产生复位
#endif /* defined(START_FROM_FLASH) */

#endif//defined(TURN_ON_CPU2)

//做一次模式转换,启动一次复位,使前面配置的地址生效
MC_ME.MCTL.R = (mctl & 0xffff0000ul) | KEY_VALUE1;
MC_ME.MCTL.R = mctl; /* key value 2 always from MCTL */


#endif /* defined(DEBUG_SECONDARY_CORES) */
}

CAN到初始化会死循环在这里:

/* wait until FlexCAN ready */
while(1 == CAN_0.MCR.B.FRZACK){};
while(1 == CAN_0.MCR.B.NOTRDY){};

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PetrS
NXP TechSupport
NXP TechSupport

Hi,

is the other core execute some code that modifies CAN module, the clocks or pins used by that CAN?

I can recommend to check the setting relevant for CAN and see for any changes.

BR, Petr 

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