551x Exception recording

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551x Exception recording

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markelson
Contributor III

Hi,

 

My application has the ability to record data to non-volatile memory. I am trying to determine which registers etc are best to record to diagnose what happened in the event of a processor exception (e.g. as caused by a divide-by-zero). The ESR, MCSR and DEAR look like obvious ones. What else would be recommended? Is there any existing guidance on this, e.g. an AN?

 

TIA, Mark

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davidtosenovjan
NXP TechSupport
NXP TechSupport

It is explicitly stated in chapter 5.7 Interrupt Definitions in core reference manual and it is different for every particular exception:

http://cache.freescale.com/files/32bit/doc/ref_manual/e200z1RM.pdf

http://cache.freescale.com/files/32bit/doc/ref_manual/e200z0RM.pdf

It says which register are being written during exception and which are untouched.

For instance:

IVOR0 writes CSRR0, CSRR1 and MSR

IVOR1 writes CSRR0, CSRR1, MSR and MCSR

and so on…

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davidtosenovjan
NXP TechSupport
NXP TechSupport

It is explicitly stated in chapter 5.7 Interrupt Definitions in core reference manual and it is different for every particular exception:

http://cache.freescale.com/files/32bit/doc/ref_manual/e200z1RM.pdf

http://cache.freescale.com/files/32bit/doc/ref_manual/e200z0RM.pdf

It says which register are being written during exception and which are untouched.

For instance:

IVOR0 writes CSRR0, CSRR1 and MSR

IVOR1 writes CSRR0, CSRR1, MSR and MCSR

and so on…

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markelson
Contributor III

David,

That's the extra info I needed - I'd been looking in the 5510RM only.

Thank you,

Mark

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