Detailed Description: Demo application performs I2C communication with externally connected external real time clock/calendar PCA8565. Obtained values and processed and displayed on MPC5606S-DEMO-V2 board’s TFT panel. Date and time may be set up by demo board’s buttons (SW2-SW6). Application uses standard Graphics Libraries for MPC5606S for simple graphic output that is managed in mc_base.c module only. I2C communication is managed with using of own two layer driver where low-level driver consisting of I2C_0.c and I2C_0.h - these can be used for any device connected to I2C_0 module. Middle-level driver layer consist of I2C_PCA8565.c and I2C_PCA8565.h and it is specific to PCA8565 device. ------------------------------------------------------------------------------ Test HW:            MPC5606S-DEMO-V2 + LM75BD + HIH-5030 + PCA8565 sensors MCU:             PPC5606SEF OMLU 0M25V DD68391 XOTAC1003 Fsys:            64MHz Debugger:        Lauterbach Trace32 Target:          internal_FLASH Terminal:        none EVB connection:   For complete project you may see following link: Demo application MPC5606S-DEMO + LM75B + HIH-5030 + PCA8565 + GUI

******************************************************************************** * Detailed Description: * * * This example shows synchronization between eTimer, CTU and ADC modules. * The eTimer0 module timer 2 is initialized to generate PWM signal, and rising edge * of this signal is used to generate trigger signal for CTU module. The CTU module * use one command list with 4 ADC_0 channels. Single conversion mode is used, * so ADC0 ch0, ch1, ch2 and ch3 are sampled. * ------------------------------------------------------------------------------ * Test HW:  MPC57xx * Maskset:  1N65H * Target :  internal_FLASH * Fsys:     200 MHz PLL with 40 MHz crystal reference * * EVB connection: * * P8.1  - A[0]  .. GPIO output, used to see CTU-ADC ISR period * P9.1     - B[7]  .. ADC0 AN[0] input * P9.2     - B[8]  .. ADC0 AN[1] input * P16.4 - I[3] .. CTU0 EXT TRG output * * see CTU0 EXT TRG output signal (toggle on each trigger) on P16.4 with respect of eTimer PWM signals. * ********************************************************************************

On demand Patrice Cavin and with Andrey Butok agreement I publish here FNET example for S32 Design Studio.

******************************************************************************** * Detailed Description: * Initializes eQADC module for differnential single scan mode (with choosen GAIN * factor), converts specified command queue and displays results into terminal * window when EOQ is reached. * Differential analog input DAN0+:DAN0- needs to be connect externally between * pins ANA_0 and ANA_1 to see some valid numbers. * EVB potentiomenters can be used for the purpose. * As differential mode has been used, eQADC does not required to be calibrated.             * * ------------------------------------------------------------------------------ * Test HW:         XPC567XKIT516 - MPC5674ADAT516 Rev.C, MPC567XEVBFXMB Rev.B * MCU:             PPC5674FMVYA264 * Terminal:        19200-8-no parity-1 stop bit-no flow control on eSCI_A * Fsys:            264/200/150/60 MHz * Debugger:        Lauterbach Trace32 *                  PeMicro USB-ML-PPCNEXUS * Target:          RAM, internal_FLASH * EVB connection:  Potentiometers     --> ADC inputs *                  USER_DEV_RV2(J4-7) --> ANA_0 (J18-3) DAN0+ *                  USER_DEV_RV3(J4-8) --> ANA_1 (J18-4) DAN0- * *                    Buttons            --> ADC triggers *                    USER_DEV_1D(J4-2)  --> TPU_A0 (J22-1)                  ********************************************************************************

******************************************************************************** * Detailed Description: * Application performs basic initialization, initializes interrupts, blinking * one LED by Core0, second by Core1 (by interrupt), initializes and display * notice via UART terminal and then terminal ECHO. * * ------------------------------------------------------------------------------ * Test HW:         MPC5777C-512DS Rev.A + MPC57xx MOTHER BOARD Rev.C * MCU:             PPC5777CMM03 2N45H CTZZS1521A * Fsys:            PLL1 = core_clk = 264MHz, PLL0 = 192MHz * Debugger:        Lauterbach Trace32 * Target:          internal_FLASH * Terminal:        19200-8-no parity-1 stop bit-no flow control on eSCI_A * EVB connection:  ETPUA30 (PortP P23-15) --> USER_LED_1 (P7-1) *                  ETPUA31 (PortP P23-14) --> USER_LED_2 (P7-2) * ********************************************************************************

******************************************************************************** * Detailed Description: * This example shows how to use PIT module for triggering interrupts on its timeout. * * This example shows how to use PIT module for triggering interrupts on its timeout. * For closer details on how PIT works I suggest you to check reference manual as this is quite simple timer. * This example sets PIT timer0 channel0 for 5000000 cycles. * As soon as it exceeds the interrupt is triggered. * Pin state is toggling in ISR * * ------------------------------------------------------------------------------ * Test HW:  MPC57xx Motherboard + MPC5744PE257DC minimodule, MPC5744P, * silicon mask set 1N65H * Target :  internal_FLASH* ********************************************************************************

******************************************************************************** * Detailed Description: * This example content a basic PMPLL initialization and * configuration of Mode Entry module and Clock Generation * module. By default active is core 2 -> e200z4a * Configure PIT timer to trigger interrupt and service it. * Example configures start of z7 cores via SW routine. * ------------------------------------------------------------------------------ * Test HW:  MPC57xx MB + MPC5775K-326DS minimodule * Maskset:  0N76P * Target :  internal_FLASH * Fsys:     265 MHz PLL with 40 MHz crystal reference * ******************************************************************************** Revision History: 1.0     Sep-07-2017     b21190(Vlna Peter)  Initial Version *******************************************************************************/ Example also contains Lauterbach multicore script as you can see below: It will display 3 Power view instances.

The aim of the MPC5643L PWM triggered measurement concept is to introduce hardware  subsystem concept of autonomous triggering of ADC measurement by PWM module in desired time intervals and automatic storing of measured data into buffer located in SRAM. This autonomous measurement concept will offload the microprocessor’s core and presents the very precise way how to achieve the ADC time critical measurement synchronized with PWM signal generated by FlexPWM module.

******************************************************************************** * Detailed Description: * This example shows, how to initialize FlexCAN modules for simple transmission * and reception using RX interrupt. Both modules are configured for 100kbit/s * bit rate. CAN_0 module transmits message using MB0. CAN_1 module receives * message using interrupt via MB0. * * * ------------------------------------------------------------------------------ * Test HW:         MPC5748G-324DS, MPC574XG - Motherboard * MCU:             PPC5748GMMN6A 1N81M * Fsys:            PLL0 160MHz * Debugger:        Lauterbach Trace32 *                  PeMicro USB-ML-PPCNEXUS * Target:          internal_FLASH (debug mode, release mode) * EVB connection:  Connect jumpers J15 and J16 on motherboard *                    Connect P14 H to P15 H *                    Connect P14 L to P15 L * ********************************************************************************

Detailed Description:                      This config tool simplifies DCF records calculation for S32R274 device.                 Look at HowToUse sheet for simple guideline, then work with DCF sheet                 Notes: - Macros have to be enabled!         BR, Petr

******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL to maximum allowed freq., * initializes interrupts and initializes software watchdog with window mode * allowed. Window mode is set for 2.5 ms. PIT timer is set to service SWT each * 8 ms, which is inside the window. * * * ------------------------------------------------------------------------------ * Test HW:         XPC560B 100LQFP, XPC56XX EVB MOTHEBOARD Rev.C * MCU:             PPC5604BE MLL 1M27V * Fsys:            64 MHz * Debugger:        Lauterbach Trace32 *                  PeMicro USB-ML-PPCNEXUS * Target:          RAM, internal_FLASH * EVB connection:   * ********************************************************************************

******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL to maximum allowed freq., * start both Z7 cores, interrupts initialization, blinking three LED by interrupts, * initializes and display notice via UART terminal and then terminal ECHO. * Each core serves one interrupt and one LED. * * The example configures the device for maximum performance by initialization of * instruction/data cache and enabling of branch prediction for each core * (startup.s files). * * ------------------------------------------------------------------------------ * Test HW:         MPC5777M-512DS, MPC57xx Motherboard * MCU:             PPC5777MQMVA8 0N78H * Terminal:        19200-8-no parity-1 stop bit-no flow control on LINFlexD_2 * Fsys:               600MHz * * Debugger:        Lauterbach Trace32 *                  PeMicro USB-ML-PPCNEXUS * Target:          internal_FLASH (debug mode, release mode) * EVB connection:  USER LED1 connected to P8.0, LED2 connected to P8.1 *                  LED3 connected to P8.2 * ********************************************************************************

******************************************************************************** * Detailed Description: * This example demonstrate DMA transfer triggered by eTimer module compare * event CMPLD1 load into COMP1. Used is eTimer_0 channel_5. * It is necessary to configure DREQ[x] register according to channel_5 of * eTimer_0. * ------------------------------------------------------------------------------ * Test HW:  MPC57xx * Maskset:  0N89D * Target :  SRAM * Fsys:     120 MHz PLL * ******************************************************************************** Revision History: 1.0     Apr-08-2016     b21190(Vlna Peter)  Initial Version *******************************************************************************/

******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL1 to maximum allowed freq. PLL1 is system frequency, * PLL0 in initialized to 50MHz * initializes peripherals clock (MOTC_CLK is set to 5MHz) * initializes ETimer to count mode providing delay * initializes interrupts, blinking one LED by ETimer interrupt, * * * * Test HW:         X-MPC5744PE257DC, MPC57xx motherboard * MCU:             PPC5744PFMMM8 1N65H * Fsys:            200 MHz * Debugger:    Lauterbach Trace32 *                      PeMicro USB-ML-PPCNEXUS * Target:          internal_FLASH (debug mode, release mode) * EVB connection:  User LED 1 connected to A0 (P8.0), * * * ------------------------------------------------------------------------------

******************************************************************************** * Detailed Description: * Initializes eQADC module, performs calibration and cyclically converts PMC * internal channel as specified by macros CHOOSEN_PMC_ADC_CHNL, * CHOOSEN_PMC_ADC_SCALE and CHOOSEN_PMC_ADC_COMMAND to check particular voltage * level, displaying it into terminal window. * No external connection required excluding terminal via eSCI. * ------------------------------------------------------------------------------ * Test HW:         XPC567XKIT516 - MPC5674ADAT516 Rev.C, MPC567XEVBFXMB Rev.B * MCU:             PPC5674FMVYA264 * Terminal:        19200-8-no parity-1 stop bit-no flow control on eSCI_A * Fsys:            264/200/150/60 MHz * Debugger:        Lauterbach Trace32 * Target:          internal_FLASH, RAM * Terminal:        19200-8-no parity-1 stop bit-no flow control * EVB connection:  default ********************************************************************************

MPC5746R STCU2 configuration guide for: 1. Off-line BIST 2. On-line BIST rev 0.4

******************************************************************************** * Detailed Description: * Example dimmes LED1 according on board potentiometr. LED2 and LED3 demostrates * ADC watchdog functionality. LED2 is turned on when signal level is below LOW * threshold, LED3 is turned on when signal is above HIGH threshold. * Example also displays coverted results to the terminal window. * ------------------------------------------------------------------------------ * Test HW:         XPC560B 100LQFP, XPC56XX EVB MOTHEBOARD Rev.C * MCU:             PPC5604BE MLL 1M27V * Terminal:        19200-8-no parity-1 stop bit-no flow control on LINFLEX_0 * Fsys:            64/48 MHz * Debugger:        Lauterbach Trace32 *                  PeMicro USB-ML-PPCNEXUS * Target:          RAM, internal_FLASH * EVB connection:  - initialize PB[8] as ANS0: connect potentiometer to PB[8]                      pin, remove J30 jumper and connect J30.2 with P2.9                    - header J8 (LED_EN) fully fitted ********************************************************************************

******************************************************************************** * Detailed Description: * Example configures Sigma_Delta ADC and periodically converts ANA0_SDA0 input * (EVB's potentiometer can be connected i.e. J53-1 --> PO15) and displays * results in the terminal window (USBtoUART bridge J21). Terminal settings is * 19200-8-no parity-1 stop bit-no flow control on eSCI_A. * Example uses external ADC triggering from eTPU channels, that are for purpose * of this example configured for eTPU GPIO function for all eTPU channels that * can trigger start of SDADC conversion. * * ------------------------------------------------------------------------------ * Test HW:         MPC5777C-512DS Rev.A + MPC57xx MOTHER BOARD Rev.C * MCU:             PPC5777CMM03 2N45H CTZZS1521A * Fsys:            PLL1 = core_clk = 264MHz, PLL0 = 192MHz * Debugger:        Lauterbach Trace32 * Target:          internal_FLASH * Terminal:        19200-8-no parity-1 stop bit-no flow control on eSCI_A *                  eSCI_A is USBtoUART bridge (connector J21) * EVB connection:  For ADC: J53-1 (EVB pot's wiper) --> PO15 (header P22) * ********************************************************************************

******************************************************************************** * Detailed Description: * * eMIOS0 ch0 is set to SAIC mode generating interrupt on falling edge. * The IGF ch16, connected to eMIOSch0, is set to filter low pulses <1.5us * Intergation filter type is used for falling edge with given threshold. * eMIOS interrupt is called if input signal low pulse is longer than 1.5us. * * ------------------------------------------------------------------------------ * Test HW: MPC5777C-512DS Rev.A + MPC57xx MOTHER BOARD Rev.C * MCU: PPC5777CMM03 2N45H CTZZS1521A * Fsys: PLL1 = core_clk = 264MHz, PLL0 = 192MHz * Debugger: Lauterbach Trace32 * Target: internal_FLASH * Terminal: 19200-8-no parity-1 stop bit-no flow control on eSCI_A * use USB connector (J21) on minimodule * * EVB connection: ETPUA30 (PortP P23-15) --> USER_LED_1 (P7-1) * ETPUA31 (PortP P23-14) --> USER_LED_2 (P7-2) * * eMIOS ch0 (PortG P14-16)--> connect external pulse signal * ********************************************************************************

******************************************************************************** * Detailed Description: * This example shows how to use eDMA for transfering 32-bit data from internal flash to SRAM memory as well as how to configure AIPS (peripheral bridge) to grant eDMA access to peripherals. * * For closer details on how eDMA works I suggest you to check reference manual as this module is quite complex. * This example sets system clock for 200MHz running from PLL0 module. * The constant stored in internal flash is transfered via eDMA to SRAM memory. * Initialization functions are AIPS_0_Init for peripheral bridge and DMA_0_Init. * * ------------------------------------------------------------------------------ * Test HW:  MPC57xx Motherboard + MPC5744PE257DC minimodule, MPC5744P, * silicon mask set 1N65H * Target :  internal_FLASH* ********************************************************************************