Example MPC5777C FCCU_FOSU_error_injection GHS714

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

Example MPC5777C FCCU_FOSU_error_injection GHS714

Example MPC5777C FCCU_FOSU_error_injection GHS714

********************************************************************************
* Detailed Description:
*
* Purpose of the example is to show how to intentionally generate FCCU fault
* causing reset either directly or by FOSU (simulating by non-handled FCCU
* fault). Example configures FCCU, then an error is injected with using of
* Noncritical Fault Fake register and after re-booting reset cause is evaluated.
* The example displays notices in the terminal window (connector J19 on
* MPC57xx_Motherboard)(19200-8-no parity-1 stop bit-no flow control on eSCI_A).
* No other external connection is required.
*
* ------------------------------------------------------------------------------
* Test HW:         MPC5777C-512DS Rev.A + MPC57xx MOTHER BOARD Rev.C
* MCU:             PPC5777CMM03 2N45H CTZZS1521A
* Fsys:            PLL1 = core_clk = 264MHz, PLL0 = 192MHz
* Debugger:        Lauterbach Trace32
* Target:          internal_FLASH
* Terminal:        19200-8-no parity-1 stop bit-no flow control on eSCI_A
* EVB connection:  eSCI_A is USBtoUART bridge (connector J21)
*
********************************************************************************

Attachments
%3CLINGO-SUB%20id%3D%22lingo-sub-1112102%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3EExample%20MPC5777C%20FCCU_FOSU_error_injection%20GHS714%3C%2FLINGO-SUB%3E%3CLINGO-BODY%20id%3D%22lingo-body-1112102%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3E%3CP%3E********************************************************************************%3CBR%20%2F%3E*%20Detailed%20Description%3A%3CBR%20%2F%3E*%3CBR%20%2F%3E*%20Purpose%20of%20the%20example%20is%20to%20show%20how%20to%20intentionally%20generate%20FCCU%20fault%3CBR%20%2F%3E*%20causing%20reset%20either%20directly%20or%20by%20FOSU%20(simulating%20by%20non-handled%20FCCU%3CBR%20%2F%3E*%20fault).%20Example%20configures%20FCCU%2C%20then%20an%20error%20is%20injected%20with%20using%20of%3CBR%20%2F%3E*%20Noncritical%20Fault%20Fake%20register%20and%20after%20re-booting%20reset%20cause%20is%20evaluated.%3CBR%20%2F%3E*%20The%20example%20displays%20notices%20in%20the%20terminal%20window%20(connector%20J19%20on%3CBR%20%2F%3E*%20MPC57xx_Motherboard)(19200-8-no%20parity-1%20stop%20bit-no%20flow%20control%20on%20eSCI_A).%3CBR%20%2F%3E*%20No%20other%20external%20connection%20is%20required.%3CBR%20%2F%3E*%3CBR%20%2F%3E*%20------------------------------------------------------------------------------%3CBR%20%2F%3E*%20Test%20HW%3A%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%20MPC5777C-512DS%20Rev.A%20%2B%20MPC57xx%20MOTHER%20BOARD%20Rev.C%3CBR%20%2F%3E*%20MCU%3A%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%20PPC5777CMM03%202N45H%20CTZZS1521A%3CBR%20%2F%3E*%20Fsys%3A%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%20PLL1%20%3D%20core_clk%20%3D%20264MHz%2C%20PLL0%20%3D%20192MHz%3CBR%20%2F%3E*%20Debugger%3A%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%20Lauterbach%20Trace32%3CBR%20%2F%3E*%20Target%3A%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%20internal_FLASH%3CBR%20%2F%3E*%20Terminal%3A%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%2019200-8-no%20parity-1%20stop%20bit-no%20flow%20control%20on%20eSCI_A%20%3CBR%20%2F%3E*%20EVB%20connection%3A%26nbsp%3B%20eSCI_A%20is%20USBtoUART%20bridge%20(connector%20J21)%3CBR%20%2F%3E*%3CBR%20%2F%3E********************************************************************************%3C%2FP%3E%3C%2FLINGO-BODY%3E%3CLINGO-TEASER%20id%3D%22lingo-teaser-1112102%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3E%3CP%3E********************************************************************************%3CBR%20%2F%3E*%20Detailed%20Description%3A%3CBR%20%2F%3E*%3CBR%20%2F%3E*%20Purpose%20of%20the%20example%20is%20to%20show%20how%20to%20intentionally%20generate%20FCCU%20fault%3CBR%20%2F%3E*%20causing%20reset%20either%20directly%20or%20by%20FOSU%20(simulating%20by%20non-handled%20FCCU%3CBR%20%2F%3E*%20fault).%20Example%20configures%20FCCU%2C%20then%20an%20error%20is%20injected%20with%20using%20of%3CBR%20%2F%3E*%20Noncritical%20Fault%20Fake%20register%20and%20after%20re-booting%20reset%20cause%20is%20evaluated.%3CBR%20%2F%3E*%20The%20example%20displays%20notices%20in%20the%20terminal%20window%20(connector%20J19%20on%3CBR%20%2F%3E*%20MPC57xx_Motherboard)(19200-8-no%20parity-1%20stop%20bit-no%20flow%20control%20on%20eSCI_A).%3CBR%20%2F%3E*%20No%20other%20external%20connection%20is%20required.%3CBR%20%2F%3E*%3CBR%20%2F%3E*%20------------------------------------------------------------------------------%3CBR%20%2F%3E*%20Test%20HW%3A%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%20MPC5777C-512DS%20Rev.A%20%2B%20MPC57xx%20MOTHER%20BOARD%20Rev.C%3CBR%20%2F%3E*%20MCU%3A%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%20PPC5777CMM03%202N45H%20CTZZS1521A%3CBR%20%2F%3E*%20Fsys%3A%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%20PLL1%20%3D%20core_clk%20%3D%20264MHz%2C%20PLL0%20%3D%20192MHz%3CBR%20%2F%3E*%20Debugger%3A%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%20Lauterbach%20Trace32%3CBR%20%2F%3E*%20Target%3A%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%20internal_FLASH%3CBR%20%2F%3E*%20Terminal%3A%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%26nbsp%3B%2019200-8-no%20parity-1%20stop%20bit-no%20flow%20control%20on%20eSCI_A%20%3CBR%20%2F%3E*%20EVB%20connection%3A%26nbsp%3B%20eSCI_A%20is%20USBtoUART%20bridge%20(connector%20J21)%3CBR%20%2F%3E*%3CBR%20%2F%3E********************************************************************************%3C%2FP%3E%3C%2FLINGO-TEASER%3E
No ratings
Version history
Last update:
‎07-02-2020 12:51 AM
Updated by: