SPI on MCXC242

[firmwareteam]

Objective : Board to Board SPI Communication 

I am using SDK examples

frdmmcxc242_spi_polling_b2b_transfer_master

frdmmcxc242_spi_polling_b2b_transfer_slave

By default in this examples SPI Slave Select is configured automatic. Example is working fine. Please see the attached snashot of logic analyzer.

SPI_CS_AUTO.png

However When I am driving the Chip Select manually, I observe that Slave data on MISO line is delayed by 1 byte and there is a data mismatch. Hence example is not working. Attached snapshot.

SPI_CS_GPIO_MANUAL.png

Kindly help to resolve this issue.

#MCXC242

[firmwareteam]

@Celeste_Liu Do you have any update to share?

[Celeste_Liu]

Hello @firmwareteam ,

Sorry for the late reply. 

I think this situation is because the slave MISO sent an extra data 0. I did an experiment: even if the initial data is changed to 3 instead of 0, the slave MISO still sends an extra data 0.

And I think that the occurrence of this delay is normal. You can just remove the first data of the slave, and then there will be no problem.

BRs,

Celeste

[firmwareteam]

The question is why its working correctly when CS is kept automatic?

Also, I will be loosing the last byte of data from the slave in this case which is not acceptable for my project.

Kindly suggest further.

[Celeste_Liu]

Hello @firmwareteam ,

I was able to identify the root cause of the issue. The problem is located in the master project. It appears to be related to the CPHA configuration. As stated in Section 35.5.7, "SPI Clock Formats," of the Reference Manual, when CPHA is set to 0, the chip select (CS) line must remain idle between transfers.

Due to this requirement, modifying the chip select mode alters the behavior of the MCXC242.

To address this, you can update your code as follows:

Remove the lines:

GPIO_PinWrite(GPIOC, 4U, 0U);
GPIO_PinWrite(GPIOC, 4U, 1U);

from the main function, and instead, place them within the SPI_MasterTransferBlocking function located in the fsl_spi.c file.

This modification will ensure proper data transmission, as the chip select line will now behave according to the timing requirements specified for CPHA = 0.

Hope it can help you.

BRs,

Celeste

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[Celeste_Liu]

Hello @firmwareteam ,

After rechecking, I found that when the CS is set to manual mode, except for the first bit sent by the slave, the subsequent bits are all loopback data from the master. It seems that because the slave's transmission buffer is not updated, it starts to send the last received data.

I will report the issue to the internal team to see if they have any suggestions.

BRs,

Celeste

[firmwareteam]

Are the CPOL and CPHA of the master and slave devices consistent? Yes

Please find the attached master and slave code.

Use this MACRO to switch from Slave Select Auto to Manual as GPIO. Its defined in pin_mux.h on Master Code.

#define SS_MANUAL 1

Let me know if you have any queries.

[Celeste_Liu]

Hello @firmwareteam ,

Thanks for your post. Are the CPOL and CPHA of the master and slave devices consistent? It is uncertain whether it is a delay issue. Could you add appropriate delay time after the CS assertion to see if the problem can be solved? Or you can send me your project, and I will help you check it.

BRs,

Celeste