I am working with the MIMXRT595-EVK evaluation board and am attempting to use the ROM bootloader for serial download via the SPI interface. My goal is to communicate with the bootloader and download an application image through SPI, similar to how it is commonly done via UART.
Here is my current situation:
First, I successfully verified that the ROM bootloader is functional by performing a serial download via UART(J26)
Then I am now trying to use the SPI interface on header J36 (pins 1-CS, 3-MOSI, 5-MISO, 7-SCK) for the serial download process.When I probe the signals with an oscilloscope, the MISO line (J36, pin 5) shows an incorrect and jittery waveform during the ISP communication attempt.
Questions and Points of Confusion:
I suspect that the SPI signals from the J36 header may not be properly routed to the MCU pins used by the ROM boot.
I have noticed references to a J10 header in the board documentation, but it is not physically present on my EVK.
In summary, since UART-based serial download works flawlessly, the issue appears to be specific to the SPI hardware path. My primary questions concern the correct jumper settings for J36 to enable the SPI serial downloader and the relevance of the documented but missing J10 header.
