Power supply pin configuration w/o DCDC in MCXN236VDFT

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Power supply pin configuration w/o DCDC in MCXN236VDFT

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Weber1
Contributor II

Hi community,

I'm struggeling with the power supply pin configuration of MCXN236VDFT. I want to keep the DCDC disabled, but don't get clarity about the multiple power pins of the microcontroller.

According to the comments in the FRDM-MCXN236 schematics, pins VDD_DCDC and DCDC_LX are pulled to GND through 10kR. But the therein mentioned suggestion is to disconnect VDD_CORE pins from the MCU supply, just keep the capacitors connected. But the datasheet shows that this pin is an input (-> requires an external power source for my understanding). However, somewhere else the datasheet mentions that the LDO_CORE pin is an output ("When the LDO_CORE is bypassed, the input VDD_LDO_CORE and output VOUT_CORE/VDD_CORE should be connected together...")

Which is correct? How should I connect the VOUT_CORE?

Furthermore, why should one byass the LDO_SYS by connecting (suggested option in FRDM schematic)?

Looking forward to you feedback.

Best Regards

Weber

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214件の閲覧回数
Harry_Zhang
NXP Employee
NXP Employee

Hi @Weber1 

About 1 2 3, I think you are right.

" Why should one byass the LDO_SYS by connecting (suggested option in FRDM schematic)?"

Harry_Zhang_0-1760068878477.png

You can check the figure 98.

Power direction

VDD_LDO_SYS_IN -> LDO_SYS -> VDD_SYS(VOUT_SYS).

If you want to bypass LDO_SYS.

You can connect VDD_LDO_SYS_IN to VDD_SYS.

BR

Harry

 

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237件の閲覧回数
Harry_Zhang
NXP Employee
NXP Employee

Hi @Weber1 

According to the MCX N23x Reference Manual.

Harry_Zhang_0-1759990971007.png

For packages where VDD_DCDC has an independent pin, you can connect VDD_DCDC and DCDC_LX to GND with a 10-kΩ resistor to disable DCDC. Your software must disable DCDC.

And in the FRDM-MCXN236 schematic.

Harry_Zhang_1-1759991030473.png

BR

Harry

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Weber1
Contributor II

Hi @Harry_Zhang,

thanks for feedback.

Basically I read this before in the FRDM schematics und the datasheet and the referene manual. Maybe now I have an idea:

1. VDD_LDO_CORE is an input (e.g. 3.3V).
2. If internal LDO_CORE regulator is used, it delivers VDD_CORE for internal core domain and this output is also routed on VDD_CORE pin (which makes it an output).
3. If DCDC is used,  the core domain will be supplied through VDD_CORE pin (which becomes now in input). Also VDD_LDO_CORE will be supplied by the DCDC voltage to avoid the pin floating.

Weber1_1-1759993172514.png

Does it make sense?

And my last question: Why should one byass the LDO_SYS by connecting (suggested option in FRDM schematic)?

Best regards

Weber

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Harry_Zhang
NXP Employee
NXP Employee

Hi @Weber1 

About 1 2 3, I think you are right.

" Why should one byass the LDO_SYS by connecting (suggested option in FRDM schematic)?"

Harry_Zhang_0-1760068878477.png

You can check the figure 98.

Power direction

VDD_LDO_SYS_IN -> LDO_SYS -> VDD_SYS(VOUT_SYS).

If you want to bypass LDO_SYS.

You can connect VDD_LDO_SYS_IN to VDD_SYS.

BR

Harry

 

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Weber1
Contributor II
Perfect, thank you!
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