MCXN947 failed to control GPIO in slave core (CPU1)

[jimmyli]

Hello NXP,

       I need to control GPIO or other interface in MCXN947 slave core (or CPU1, not CPU0).

       Based on example <multicore_examples\rpmsg_lite_pingpong> in v25.06 FRDM-MCXN947 sdk, then take a P0_10（RED_LED）configuration and create control code to salve core main function. After built, I find that RED_LED can't be controlled.

        Hope you can help me find the reason and fix it.

        Thanks very much.

----Test code

1>for RED_LED pin configuration, I used MCUXPresso IDE to config and generate code automatically.

   shown as below.

2>for RED_LED control, below is the code I  create in slave core project.

//---------------------------

#include "fsl_gpio.h"

#include "fsl_clock.h"

#include "fsl_common.h"

#include "pin_mux.h"

void delay_1ms(uint32_t dt)

{

uint32_t Core_Freq;

Core_Freq = CLOCK_GetCoreSysClkFreq();

for(uint32_t i=0; i<dt; i++)

{

SDK_DelayAtLeastUs(1000,Core_Freq);

}

}

//----------------------------

while(1)

{

GPIO_PinWrite(BOARD_INITPINS_CORE1_LED_RED_GPIO,BOARD_INITPINS_CORE1_LED_RED_GPIO_PIN,0U);

delay_1ms(1000);

GPIO_PinWrite(BOARD_INITPINS_CORE1_LED_RED_GPIO,BOARD_INITPINS_CORE1_LED_RED_GPIO_PIN,1U);

delay_1ms(1000);

}

 BTW, I have tested that the code shown above can work in single example, as <demo_apps\hello_world\cm33_core0>

[Logiase · Accepted solution]

Hi jimmyli

Could you please share your code snippet? 

To use LPUART peripheral does not require GPIO's configuration.

The attachment is demo code which print message from both Core0 and Core1.

Best Regards,

Logiase Song

[jimmyli]

Hi Logiase,

      Thanks very much.

      I will take test with your example.

      Any question, I will give a feedback soon.

[Logiase]

Hi, jimmyli

Please configure the register `PCNS` in GPIO peripheral. This register controls if the corresponding pin‘s registers can be modified in Secure/NonSecure state.

The Core1 in MCXN947 does not implement SAU(Security Attribute Unit), which means that the Core1 is always in NonSecure state, so register read/write to corresponding pin's registers under Core1 has no effect.

Best Regards,

Logiase Song

[Logiase]

Hi, jimmyli

Please configure the register `PCNS` in GPIO peripheral. This register controls if the corresponding pin‘s registers can be modified in Secure/NonSecure state.

The Core1 in MCXN947 does not implement SAU(Security Attribute Unit), which means that the Core1 is always in NonSecure state, so register read/write to corresponding pin's registers under Core1 has no effect.

Best Regards,

Logiase Song

[jimmyli]

Hi Logiase,

     Thanks very much for your replying.

     Yes, I have found that before booting core1, it needs to config the referent pin to non secure state and can be controlled by core1 , and the pin can be controlled by core1.

  ----below code is added to initHardware() in core0 project  

CLOCK_EnableClock(kCLOCK_Gpio0);

GPIO_EnablePinControlNonSecure(BOARD_LED_RED_GPIO, (1 << BOARD_LED_RED_GPIO_PIN));

  But, I have a new question that when I only config uart pin to non secure state and initialize uart model in core1 project, the uart interface can't work.

Do you have some tips for this problem ?

Thanks very much.