MCXN947 eIQ Neutron NPU supported operators

[TomC818]

Hello, I want to evaluate using TF micro with NPU delegation, however, may I please know what the supported operators are. I have seen the post "How to get started with NPU and ML in MCX Microcontrollers" Is that all the supported operators? Would it be possible to create some custom operators to use the on-chip PowerQuad DSP to handle floating point data?

[carlos_o]

Hi @TomC818 

Thanks for your question.

Review the document eIQ TensorFlow Lite Library User's Guide.pdf you could find it at the SDK of the MCXN947 at \middleware\eiq\doc\ there the table 2 list the supported operations but the list that is at the post you share are the Hardware optimized TFLM operators.

Let me know if you have more questions about this topic.

[TomC818]

@carlos_o I searched on the official website of NXP, there are no document as you described thus far. But can you further elaborate on "HW optimized operators"? What does that mean exactly? So are these the only operator that can run on the eIQ NPU and all other operators have to fallback to the M33 with cmsis-nn?

[TomC818]

@carlos_o Hi, I just downloaded another new SDK of MCXN947 with all available middleware from the SDK builder. I don't have such User's Guide. Can you make sure that is a publicly available document?

[carlos_o]

Hi @TomC818 

Could you share which version of the SDK are you downloading? And the content of the folder where you unzip the sdk?

[TomC818]

@carlos_o I downloaded the latest version. There are no doc folder in eIQ. Can you confirm that the user guide is packaged with the sdk?

[carlos_o]

Hi @TomC818 

I review that the documentation I mentioned is only included in the FRDM-MCXN947 SDK, apologies for the inconvenience. Could you please download it and confirm that you can see the docs folder at eiq middleware? 

About your question of HW optimized TFLM opertaros, you are in the correct the operators on that list are the one that can be run on the eIQ NPU, the other operators are executed at the Cortex-M33 with cmsis-nn.