Hello, I am trying to determine which pins to use for a full duplex I2S interface. The I2S device is a TAD5112 DAC. I have attached a diagram to make it clearer what I am trying to do.
It is pretty clear I would use the TX_DATA[0] and RX_DATA[0] signals for the I2S data. However for BCLK and SYNC signals, should I be using the TX_BCLK/SYNC or RX_BCLK/SYNC signal(s)? Or does it matter whether I use individual the TX or RX signal, meaning could I pick RX_BCLK and TX_SYNC if it simplifies routing on a PCB?
The MCXN547 will be configured as the controller and will generate BSYNC.
I have tried to find reference material. The FRDM-MCXN236 schematics show the TX SYNC and BCLK pins are used with the DA7212. The MCX-N5XX-EVK schematics allow switching between TX and RX BCLK/FS but this does not clarify whether I can arbitrarily pick whether to use TX or RX BCLK/FS. This is because I would like to test this on a FRDM-MCXN947 where only the RX pins are exposed on the FRDM header by default (of course I could adjust the solder jumpers as if needed).
The Nx4x reference manual, "67.3.2 Synchronous modes (Rev 6)" states that I should configure the transmitter for asynchronous operation and the receiver for synchronous mode operation if both the transmitter and receiver use the transmitter bit clock and frame sync. Would this be the configuration I would need for the use case I have described?
Thanks
