MCX C wakeup by LPUART using 9600 with external 32.768KHz crystal?

[frank-lin-Sunon]

We plan to use mcxc142 in our project.
Before starting the project, we want to confirm that mcxc142 uses an external 32.768KHz crystal as the LPUART(9600,8,N,1) clock source, and when the data arrives, the LPUART can wake up the mcu and no data lost or data errors.

#mcxc

[Harry_Zhang]

Hi @frank-lin-Sunon 

Yes, you can refer to this picture.

RUN WAIT STOP VLPR VLPW VLPS LLS

In these low-power modes, it is possible to wake up without losing data.

Hope this will help you.

BR

Hang

[frank-lin-Sunon]

Hi @Harry_Zhang ,

Yes, we understand that LPUART can run in the mode you mentioned without data lost/frame error.

But based on our past experience, 32.768KHz is not enough to run 9600 baud rate, unless the IC itself is specially designed for this. Usually if it is, it will be written in the file. 

For example in silicon lab efm32zg datasheet:

Or for Nuvoton M480:   https://www.wpgdadatong.com/blog/detail/40814

So we wanted to confirm if mcxc142 can actually do this.

[Harry_Zhang]

Hi @frank-lin-Sunon 

I'm sorry, for MCX C, 32.768KHz is not enough to run 9600 baud rate.

BR

Hang

[frank-lin-Sunon]

@Harry_Zhang 

We know that we can use the internal 8M frequency divider to 2M as the LPUART clock source.
But the internal low-frequency error reaches ±3%. Usually the minimum requirement that does not cause UART communication abnormalities is 5%, but since it shares 5% with the peer MCU, the single-sided error requirement is 2.5%. Is our understanding correct?
Does NXP have any special suggestions for saving power in UART communication of 9600?

[Harry_Zhang]

Hi @frank-lin-Sunon 

Yes, your understanding is correct.

Abort saving power in UART communication.

I think you can reduce the baud rate and enter low-power mode.

BR

Hang