unidirectional SPI configuration

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unidirectional SPI configuration

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Contributor I

Hi

I have the LPCXpresso55S28 development board and want to control an OLED display with SPI interface (EA OLEDL128-6, controller SSD1309). The display can only receive data and not send. So I tried to use the SDK examples spi_interrupt and spi_dma_b2b_transfer_master. Both examples work with a master and a slave and I managed to get them working for some commands.

Beside sending data with DMA, I also tried to send data with the function SPI_WriteData. Unfortunately, after sending a particular amount of Instructions, no more data is sent. SSEL (D0) remains low and MOSI (D3) remains high. In the attached screenshot D2 is SCLK and D1 is RESET.

I'm quite sure that the reason is that I do not receive any data and the buffer is full after some instructions.

My questions are:

1) How can I configure the SPI interface as master only? According to the manual, RXIGNORE control bit can be used to avoid the need to read the received data. Can someone give me an example for a working configuration?
2) Does it make sense to use DMA when I do not receive any data? I think interrupt is the better way to go.

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Contributor I

I figured out the issue shown in the screenshot.

After sending Data over SPI by use of the function SPI_WriteData, it is necessary to read the data from the FIFO back with the function SPI_ReadData. Otherwise, SPI stops working as can be seen in the screenshot.

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NXP TechSupport
NXP TechSupport

Hello Roland,

 

I am glad to hear that the problem has been solved and thanks for sharing the fix with the community!

 

Best regards,

Felipe

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Contributor I

After adding kSPI_RxIgnore to the drivers (fsl_spi.h, fsl_spi_dma.c), incoming data is ignored:

typedef enum _spi_xfer_option
{
    kSPI_FrameDelay  = (SPI_FIFOWR_EOF_MASK), /*!< A delay may be inserted, defined in the DLY register.*/
    kSPI_FrameAssert = (SPI_FIFOWR_EOT_MASK), /*!< SSEL will be deasserted at the end of a transfer. */
 kSPI_RxIgnore    = (SPI_FIFOWR_RXIGNORE_MASK), /*!< Received data is ignored. */
} spi_xfer_option_t;




static void XferToFifoWR(spi_transfer_t *xfer, uint32_t *fifowr)
{
    *fifowr |= ((xfer->configFlags & (uint32_t)kSPI_FrameDelay) != 0U) ? (uint32_t)kSPI_FrameDelay : 0U;
    *fifowr |= ((xfer->configFlags & (uint32_t)kSPI_FrameAssert) != 0U) ? (uint32_t)kSPI_FrameAssert : 0U;
    *fifowr |= ((xfer->configFlags & (uint32_t)kSPI_RxIgnore) != 0U) ? (uint32_t)kSPI_RxIgnore : 0U;
}

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