i have a very simple verilog code to use plu(lpc55s69)
module test(a,b,c);
input a,b;
output c;
assign c=a^b;
endmodule
i click the "Apply verilog configuration" it shows "provide source code fail to compile"
i have tried mcuxpresso ver 11.7,11.8.1, 11.10 etc all have same problem, i tried both verilog text and verilog file. all the same. is there anything need to configured in order to use this function?
thanks.