In FLEXSPI_TransferHandleIRQ(), FLEXSPI_WriteBlocking(), and FLEXSPI_ReadBlocking() input/output from/to RFDR/TFDR is 1 word more than caller specifies in 'size' parameter in certain cases
In attached image, you can see how 'size' parameter, which specifies transfer size in bytes is divided by 4 then increased by 1.
So if caller specifies:
a) Write 2 bytes : 1 word is copied into caller's buffer (Ok, as long as caller allocates in word multiples)
b) Write 3 bytes : 1 word is copied into caller's buffer (Ok, as long as caller allocates in word multiples)
c) Write 4 bytes : 2 words are copied into caller's buffer! (Buffer overflow!)
d) Write 5 bytes : 2 words are copied into caller's buffer! (Ok, as long as caller allocates in word multiples)
Does anyone know why this code does not account for case (c)?
Hi Stephen,
Please tell me what the chip, board and sample code you are using? This is useful to analysis the problem.
Waiting for your reply!
Have a great day,
Kerry
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Sorry, here is the information:
MIMXRT1052xxxxB NEW Build Date: 2018-07-17, Device: MIMXRT1052xxxxB OS: Windows, Toolchain: MCUXpresso IDE Components: (None) SDK Version: KSDK 2.4.1 (2018-06-18) |
Sample code is:
uint32_t dest[4];
flexspi_transfer_t flashXfer;
flashXfer.deviceAddress = address;
flashXfer.port = kFLEXSPI_PortA1;
flashXfer.cmdType = kFLEXSPI_Read;
flashXfer.SeqNumber = 1u;
flashXfer.seqIndex = SEQ_IDX_READ_FAST_QUAD;
flashXfer.data = (uint32_t *)dest;
flashXfer.dataSize = sizeof(dest);
FLEXSPI_TransferBlocking(FLEXSPI, &flashXfer)
Hi Stephen,
I am the LPC and kinetis engineer.
If you have the I.MX technical issue, please create the question in the I.MX area:
There will have have the according engineer to help you.
Besides, next time, when you create the question post, please add the chip part number, thank you!
Have a great day,
Kerry
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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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