SPI module registers not shown in Memory->Monitors window

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SPI module registers not shown in Memory->Monitors window

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cyuk
Contributor I

Device: Kinetis K24,

Uses "CLOCK_EnableClock(kCLOCK_Spi0)" to enable the module. By clicking on SPI0 in the peripherals window, the registers in the module should show up in the memory->monitors window while debugging.

It works for the UART, I2S, GPIOx etc., but none of the SPI modules.

I can see in the SIM module, that the clock is actually enabled to the SPI modules as expected, and I can write to the registers without getting a hardfault.

Why cannot I see the registers in the memory->monitors window?

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lpcxpresso_supp
NXP Employee
NXP Employee

This issue is scheduled to be fixed in our next IDE release (currently expected early Q3).

Regards,

MCUXpresso IDE Support

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geoff_s
Contributor III

Any further news on this ?  

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lpcxpresso_supp
NXP Employee
NXP Employee

The next IDE release is expected the middle of this month.

Regards,

MCUXpresso IDE Support

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benjaminheder
Contributor III

Hello,

It is true that the problem was solved in the new release of MCUXpresso.
Nevertheless it is still impossible to monitor SPI1 registers (slave mode).

The SDK example "dspi_polling_transfer" is working.
But after the line "CLOCK_EnableClock(s_dspiClock[DSPI_GetInstance(base)]);" SPI1 registers should be activated in the monitor.

Moreover, when the code is executed it loops in the HardFault_Handler (startup_mk66f18 file).

Would you have any idea?

Best regards,

Benjamin

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lpcxpresso_supp
NXP Employee
NXP Employee

My experiments with the example you mention (though on a K64) seem to indicate that the access to the SPI1 Transmit/Receive FIFO registers generates a fault. I can test this by accessing the individual register addresses from the GDB command line - where I see the memory fault for each FIFO register.

I'm not familiar enough with the SPI peripheral on Kinetis K parts to know why these FIFO registers are inaccessible in the configuration that the example sets up. But hopefully one of the Apps team will be able to comment on this.

The issue here, as far as the Peripheral View is concerned, is that if any of the registers inside a peripheral aborts when the peripheral is being accesses, this currently prevents the display of the peripheral (even if some of the registers are accessible). We have some ideas of how to improve behaviour in such circumstances - but unfortunately such changes are long term enhancements, not things we can simply/easily change within the IDE.

Regards,

MCUXpresso IDE Support

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cyuk
Contributor I

Any progress?

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lpcxpresso_supp
NXP Employee
NXP Employee

We have replicated and are investigating.

Regards,

MCUXpresso IDE Support

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cyuk
Contributor I

Hi, I am glad that you could replicate the problem. Have you found any easy solution, or do you know when an update is planned to solve the problem?

Is there any other method I can use in the meanwhile to work with the SPI?

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cyuk
Contributor I

Anyone having the same problem or anyone able to use SPI?

Any update Alice?

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Alice_Yang
NXP TechSupport
NXP TechSupport

Hello ulrik,

I have reported it to the MCUXpresso development team,

and will tell you after I get the reply .

Sorry for the inconvenient to you .

Hope it helps

Alice

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