Is there any way to remove the interrupt handling in the IAP eeprom for LCP11XX

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Is there any way to remove the interrupt handling in the IAP eeprom for LCP11XX

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volkan_coskun
Contributor I

Hello!

I have been reading and scrutinizing the IAP eeprom library and found out that the interrupts has to be disabled and enabled during a read and write operation.

However, for my application, I have to enable the interrupts in order to receive other high priority interrupts, so I want to do it concurrently in the background.

Today, I can write to EEPROM but I am losing messages since I am removing the interrupts.

Here is a sample code of how I do it now:

iap_eeprom_write()
{

disable_int();

invoke_iap();

// enable interrupts
enable_int();
}

Back to the problem, is it possible to create a background interrupt handler using IAP_EEPROM and remove the disable/enable interrupt functionality?

I know that there are background callbacks that can be used to handle background operation with interrupt priorities in for example data flash reads and writes.

If not, is there any other alternative for eeprom library that can be used in order to run in the background.

I would be very glad if you could provide me with some help.

regards,

Volle

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jeremyzhou
NXP TechSupport
NXP TechSupport

Hi Volkan Coskun,

Sorry for reply late.
I've attached an application note which describes the In-Application Programming capabilities of LPC11U6X, it suits LPC11E6X as well.
In the application, it provides guidance to interrupt handling during flash IAP calls. And in the attachment, it contains the demo code for referring to.

Have a great day,
TIC

 

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volkan_coskun
Contributor I

jeremyzhou

Ah ok I see.

Do you have any example code on how you move the interrupt vectors from the flash to the SRAM?

I have been trying to find example codes but have not found anything yet.

regards,

Volle

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jeremyzhou
NXP TechSupport
NXP TechSupport

Hi Volkan Coskun,

Sorry for reply late.
I've attached an application note which describes the In-Application Programming capabilities of LPC11U6X, it suits LPC11E6X as well.
In the application, it provides guidance to interrupt handling during flash IAP calls. And in the attachment, it contains the demo code for referring to.

Have a great day,
TIC

 

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volkan_coskun
Contributor I

jeremyzhou

I did some further investigation and saw that you could replace:

uint32_t command[5]; uint32_t result[5]; typedef void (*IAP)(uint32_t command[5], uint32_t result[5]); IAP *iap_entry = (IAP *)0x1FFF1FF1; … ((IAP)IAP_ENTRY)(command, result);

with:

#include "libeeprom.h" /* defines EELIB_entry */ IAP *iap_entry = (IAP *)EELIB_entry;

However, it seems that I am missing the test object "libeeprom-lpc11e68.a"  file for LPC11E68J which is used together with this library.

 

In LPC1347 EEPROM Source :

A testobject is provided here (lpcxx.a) that is used together with the libeeprom.h file.

Is there any way I can get hold of the .a file for this particular processor?

regards,

Volkan Coskun 

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jeremyzhou
NXP TechSupport
NXP TechSupport

Hi Volkan Coskun,

Thanks for your reply.
1) Is there any way I can get hold of the .a file for this particular processor?
--No, I'm afraid not.

Have a great day,
TIC

 

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jeremyzhou
NXP TechSupport
NXP TechSupport

Hi Volkan Coskun,

Thank you for your interest in NXP Semiconductor products and
for the opportunity to serve you.
The on-chip flash memory and EEPROM are not accessible during erase/write operations. When the user application code starts executing, the interrupt vectors from the user flash area are active. Before making any IAP call, either disable the interrupts or ensure that the user interrupt vectors are active in RAM and that the interrupt handlers reside in RAM.
The LPC11Exx has the ability to remap the interrupt vector table to the RAM by changing the MAP bits in the SYSMEMREMAP register. This allows interrupts to occur even during the erase and write operations. But as the flash cannot be accessed during this time, the interrupt handlers must be executed from the RAM. Hence, all the code related to the interrupt handlers must be copied from flash into the RAM.

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Have a great day,
TIC

 

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