How to enable multiple I2C channels

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How to enable multiple I2C channels

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henry_tang
Contributor II

Hi,

I'm using MCUXpresso IDE v10.3.1 [Build 2233] with the LPCXpresso board for LPC54114. I'm able to build and run the I2C sample "lpcxpresso54114_i2c_polling_b2b_transfer_master" and successfully communicate with an I2C slave. This sample uses FC4 as the I2C channel.

However, when I try to enable a second I2C channel (i.e. to have 2 active I2C channels), using FC2, the IDE will not allow me to configure FC2 as an I2C channel. Specifically, in the "Routed Pins" menu each I2C column ("I2C slew rate", "I2C drive strength", "I2C glitch filter") display "Selected pin does not support configuration of this feature." I tried each pin connected to FC2 but all of them display this error message. How do I enable FC2 as an I2C channel?

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henry_tang
Contributor II

Found out an important I2C configuration menu "Flexcomm Interface I2C" was missing from my IDE/SDK installation. So I uninstalled everything, did a clean install, and then was able to bring up that missing menu. With it, I was able to configure a 3rd FC channel and verify all 3 channels could communicate with unique I2C slaves.

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henry_tang
Contributor II

Found out an important I2C configuration menu "Flexcomm Interface I2C" was missing from my IDE/SDK installation. So I uninstalled everything, did a clean install, and then was able to bring up that missing menu. With it, I was able to configure a 3rd FC channel and verify all 3 channels could communicate with unique I2C slaves.

View solution in original post

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Alice_Yang
NXP TechSupport
NXP TechSupport

OK, please contact us if still have any question.

BR

Alice

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henry_tang
Contributor II

Hi Alice,

According to table 205, only 4 PIO pins on 5411x MCUs provide I2C support: PIO0_23, PIO0_24, PIO0_25 and PIO0_26. Therefore a maximum of 2 unique I2C buses are simultaneously supported. Please confirm this and I will close this issue.

Does NXP provide any MCU that supports 4 or more unique I2C buses simultaneously?

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henry_tang
Contributor II

Hi Alice,

Your screenshot shows the same problem that I am describing, that FC2 is not configured for I2C operation (see the RED box in my image below). Compare those settings with FC4 (the GREEN box in my image) which is properly configured for I2C.

pastedImage_1.png

I experimented and found that FC2, FC3, FC5, FC6 and FC7 all show the configuration problem described above. Only FC1 and FC4 can be configured for I2C operation.

Also note that the auto-generated pin_mux.c code for FC2 is completely different from FC4:

const uint32_t port0_pin25_config = (/* Pin is configured as FC4_RTS_SCL_SSEL1 */
IOCON_PIO_FUNC1 |
/* I2C mode */
IOCON_PIO_I2CSLEW_I2C |
/* Input function is not inverted */
IOCON_PIO_INV_DI |
/* Enables digital function */
IOCON_PIO_DIGITAL_EN |
/* Input filter disabled */
IOCON_PIO_INPFILT_OFF |
/* Low drive: 4 mA */
IOCON_PIO_I2CDRIVE_LOW |
/* I2C 50 ns glitch filter enabled */
IOCON_PIO_I2CFILTER_EN);
/* PORT0 PIN25 (coords: 3) is configured as FC4_RTS_SCL_SSEL1 */
IOCON_PinMuxSet(IOCON, 0U, 25U, port0_pin25_config);

const uint32_t port0_pin26_config = (/* Pin is configured as FC4_CTS_SDA_SSEL0 */
IOCON_PIO_FUNC1 |
/* I2C mode */
IOCON_PIO_I2CSLEW_I2C |
/* Input function is not inverted */
IOCON_PIO_INV_DI |
/* Enables digital function */
IOCON_PIO_DIGITAL_EN |
/* Input filter disabled */
IOCON_PIO_INPFILT_OFF |
/* Low drive: 4 mA */
IOCON_PIO_I2CDRIVE_LOW |
/* I2C 50 ns glitch filter enabled */
IOCON_PIO_I2CFILTER_EN);

/* PORT0 PIN26 (coords: 4) is configured as FC4_CTS_SDA_SSEL0 */
IOCON_PinMuxSet(IOCON, 0U, 26U, port0_pin26_config);

 

IOCON->PIO[0][8] = ((IOCON->PIO[0][8] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))

/* Selects pin function.
* : PORT08 (pin 43) is configured as FC2_RXD_SDA_MOSI. */
| IOCON_PIO_FUNC(PIO08_FUNC_ALT1)

/* Select Analog/Digital mode.
* : Digital mode. */
| IOCON_PIO_DIGIMODE(PIO08_DIGIMODE_DIGITAL));

IOCON->PIO[0][9] = ((IOCON->PIO[0][9] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))

/* Selects pin function.
* : PORT09 (pin 44) is configured as FC2_TXD_SCL_MISO. */
| IOCON_PIO_FUNC(PIO09_FUNC_ALT1)

/* Select Analog/Digital mode.
* : Digital mode. */
| IOCON_PIO_DIGIMODE(PIO09_DIGIMODE_DIGITAL));

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Alice_Yang
NXP TechSupport
NXP TechSupport

Hello Henry,

Each port pin PIOm_n has one IOCON register assigned to control the characteristics of
the pin. Not the same. About the detail please refer to Table 205 of LPC54114 User Manual.

For example the P0_8 of used for FLEXOMM2 on your screenshot, it use " 9.5.1 Type D IOCON registers (PIO0)",

while P0_25 for FlEXCOMM4 use the register of "9.5.2 Type I IOCON registers (PIO0)".

Hope it helps,


Have a great day,
TIC

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Alice_Yang
NXP TechSupport
NXP TechSupport

Hello Henry Tang ,

I test on my side, there is no error:

pastedImage_10.png

Could you please send your project to me, also take a screenshot about your error message.


Have a great day,
TIC

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