Problem to debug evaluation board MIMXRT1060-EVK. Hypeflash.

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Problem to debug evaluation board MIMXRT1060-EVK. Hypeflash.

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joandelatorre
Contributor II

Board: MIMXRT1060-EVK with iMXRT1062.

OS: Windows 10 x64 Home.

IDE: MCUXpresso IDE v10.2.1 [Build 795] [2018-07-25]

SDK: SDK_2.4.0_EVK-MIMXRT1060.zip

We had updated all drivers and IDE.

MCUXpresso IDE LinkServer Debugger: DAPLinf Firmware: V244.

Program sample: evkmimxrt1060_hello_world (imported directly from SDK).

 

I read all information about this evaluation kit also MIMXRT1050-EVK.

 

When I try to debug the MCUXpresso indicate error:

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MCUXpresso IDE RedlinkMulti Driver v10.2 (Jul 25 2018 11:25:37 - crt_emu_cm_redlink build 555)

Found chip XML file in C:/Dades/ws_Xpresso_Alstom/evkmimxrt1060_hello_world/Debug\MIMXRT1062xxxxA.xml

Reconnected to existing link server

Connecting to probe 1 core 0:0 (using server started externally) gave 'OK'

Probe Firmware: DAPLink CMSIS-DAP (ARM)

Serial Number:  0229000005d9b46c00000000000000000000000097969905

VID:PID:  0D28:0204

USB Path: \\?\hid#vid_0d28&pid_0204&mi_03#9&1ade6001&0&0000#{4d1e55b2-f16f-11cf-88cb-001111000030}

Using memory from core 0:0 after searching for a good core

failed to read DAP STAT register 2 - Nn(05). Wire ACK Fault in DAP access

connection failed - Nn(05). Wire ACK Fault in DAP access.. Retrying

Using memory from core 0:0 after searching for a good core

Expecting vector catch on SYSRESETREQ signal

Debug bus check after stop (MemAP 0x4770041) FAILS - Nn(05). Wire ACK Wait in DAP access

Failed on connect: Ep(01). Target marked as not debuggable.

Connected&Reset. Was: NotConnected. DpID: 00000000. CpuID: 00000C27. Info: <None>

Last stub error 0: OK

Last sticky error: 0x10 POWER AIndex: 0

Debug bus selected: MemAp 0

DAP Speed test unexecuted or failed

Debug protocol: SWD. RTCK: Disabled. Vector catch: Disabled.

(100) Target Connection Failed

error closing down debug session - Nn(05). Wire ACK Wait in DAP Access

 

 

 

I try supplies with USB power and also with external power supply because I read is possible problem when try to write the flash. I power by J2 (and  J1 à 1-2).

 

Configuration:

SW7: 2 and 3 ON, 1 and 4 OFF.

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The board has connect Hyperflash Spansion 6KS512SDPHIO2  and not QSPI 6KS512SDPHIO2.

But hello sample debug property has a driver: MIMXRT1060_SFDP_QSPI.cfx

Not hyperflash memory.

 

  I do a Mass erase of Flash with GUI Flash Tool and indicated is correct operation but use devier MIMXRT1060_SFDP_QSPI.cfx not Hyperflash driver.

I have MIMXRT1050_SFDP_HYPERFLASH.cfx

 

Cannot halt processor

 

( 40) Debug Halt

( 50) CPU ID

debug interface type      = Cortex-M7 (DAP DP ID 0BD11477) over SWD TAP 0

processor type            = Cortex-M7 (CPU ID 00000C27) on DAP AP 0

number of h/w breakpoints = 8

number of flash patches   = 0

number of h/w watchpoints = 4

Probe(0): Connected&Reset. DpID: 0BD11477. CpuID: 00000C27. Info: <None>

Debug protocol: SWD. RTCK: Disabled. Vector catch: Disabled.

Content of CoreSight Debug ROM(s):

RBASE E00FD000: CID B105100D PID 000008E88C ROM dev (type 0x1)

ROM 1 E00FE000: CID B105100D PID 04000BB4C8 ROM dev (type 0x1)

ROM 2 E00FF000: CID B105100D PID 04000BB4C7 ROM dev (type 0x1)

ROM 3 E000E000: CID B105E00D PID 04000BB00C ChipIP dev SCS (type 0x0)

ROM 3 E0001000: CID B105E00D PID 04000BB002 ChipIP dev DWT (type 0x0)

ROM 3 E0002000: CID B105E00D PID 04000BB00E ChipIP dev (type 0x0)

ROM 3 E0000000: CID B105E00D PID 04000BB001 ChipIP dev ITM (type 0x0)

ROM 2 E0041000: CID B105900D PID 04001BB975 ARCH 23B:4A13r0 CoreSight dev type 0x13 Trace Source - core

ROM 2 E0042000: CID B105900D PID 04004BB906 CoreSight dev type 0x14 Debug Control - Trigger, e.g. ECT

ROM 1 E0040000: CID B105900D PID 04000BB9A9 CoreSight dev type 0x11 Trace Sink - TPIU

ROM 1 E0043000: CID B105F00D PID 04001BB101 System dev (type 0x0)

Inspected v.2 External Flash Device on SPI using SFDP JEDEC ID MIMXRT1060_SFDP_QSPI.cfx

Image 'iMXRT1060_SFDP_QSPI Jul 25 2018 11:28:21'

Opening flash driver MIMXRT1060_SFDP_QSPI.cfx

Sending VECTRESET to run flash driver

Flash variant 'JEDEC_SFDP_Device' detected (8MB = 128*64K at 0x60000000)

Closing flash driver MIMXRT1060_SFDP_QSPI.cfx

Non-standard DAP stride detected - 1024 bytes

NXP: MIMXRT1062xxxxA

( 65) Chip Setup Complete

Connected: was_reset=true. was_stopped=false

( 70) License Check Complete

Opening flash driver MIMXRT1060_SFDP_QSPI.cfx (already resident)

Sending VECTRESET to run flash driver

Flash variant 'JEDEC_SFDP_Device' detected (8MB = 128*64K at 0x60000000)

Mass Erase flash at 0x60000000

Closing flash driver MIMXRT1060_SFDP_QSPI.cfx

MassErase completed (in 13214ms)

 

I also test with P&E Multilink Universal take of the jumper J47..J50 but I haven’t the algorithm of hyperflash of imxrt1060 and also give error.

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jingpan
NXP TechSupport
NXP TechSupport

Hi,

And I use Ulink2 as adapter, disconnect J47~J50, powered by openSDA UAB port. It works fine. I can download and debug.

Regards,

Jing

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joandelatorre
Contributor II

OK, With my P&E Multilink universal  I can download and debug also. But with the Open SDA there are problem. (download but fault in debugging process).

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Thank Jing.

Regards,

Joan

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jingpan
NXP TechSupport
NXP TechSupport

Hi Joan,

MIMXRT1060_SFDP_QSPI.cfx put code into QSPI NOR flash(IS25WP064), not in HyperFlash. Please set SW7-2 to OFF.

Regards,

Jing

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joandelatorre
Contributor II

Hi Jing:

I could debug in RAM, but in flash is not possible.

In the documentation indicate the PCB is for HyperFlash, there are also SPI flash but indicate it must necessary to change components (resistors..) to derivate to SPI flash and not hyper flash.

Have you the file to Hyperflash (MIMXRT1060_SFDP_HYPERFLASH.cfx?. I found of 1050-EVK (MIMXRT1050-EVK_S26KS512S.cfx) but not 1060-EVK and is different file.

I try configurating SPI flash but there are error:

XIP_EXTERNAL_FLASH=1

XIP_BOOT_HEADER_ENABLE=1

Error: SW7-2: OFF selection of SPI Flash.

MCUXpresso IDE RedlinkMulti Driver v10.2 (Jul 25 2018 11:25:37 - crt_emu_cm_redlink build 555)

Found chip XML file in C:/Dades/ws_Xpresso_Alstom/evkmimxrt1060_pwm/Debug\MIMXRT1062xxxxA.xml

Reconnected to existing link server

Connecting to probe 1 core 0:0 (using server started externally) gave 'OK'

Probe Firmware: DAPLink CMSIS-DAP (ARM)

Serial Number: 0229000005d9b46c00000000000000000000000097969905

VID:PID: 0D28:0204

USB Path:
?\hid#vid_0d28&pid_0204&mi_03#9&1ade6001&0&0000#{4d1e55b2-f16f-11cf-88cb-001111000030}

Using memory from core 0:0 after searching for a good core

debug interface type = Cortex-M7 (DAP DP ID 0BD11477) over SWD TAP 0

processor type = Cortex-M7 (CPU ID 00000C27) on DAP AP 0

number of h/w breakpoints = 8

number of flash patches = 0

number of h/w watchpoints = 4

Probe(0): Connected&Reset. DpID: 0BD11477. CpuID: 00000C27. Info:

Asunto: Re: - Re: Problem to debug evaluation board MIMXRT1060-EVK. Hypeflash.

<https://community.freescale.com/resources/statics/1000/35400-NXP-Community-Email-banner-600x75.jpg> NXP Community

Re: Problem to debug evaluation board MIMXRT1060-EVK. Hypeflash.

reply from Jing Pan <https://community.nxp.com/people/jingpan?et=watches.email.thread> in MCUXpresso Software and Tools - View the full discussion <https://community.nxp.com/message/1081932?commentID=1081932&et=watches.email.thread#comment-1081932>

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jingpan
NXP TechSupport
NXP TechSupport

Hi,

In MIMXRT1060 Evaluation Kit Board Hardware User's Guide sector 2.7, it says The QSPI flash is the default onboard flash. You must do some hardware modify to use HyperFlash. Details please find in EVK's schematic.

MIMXRT1050_SFDP_HYPERFLASH.cfx is not ready. The next release of MCUXpresso IDE 10.3 is expected later this year and will include a 1060 hyperflash SFDP driver. If you want to use HyperFlash, You can use Serial Downloader. Details please found in https://www.nxp.com/docs/en/application-note/AN12107.pdf

Regards,

Jing

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joandelatorre
Contributor II

Hi,

I gone to NXP seminary with i.MX RT1050 and give me documentation about this board and it need to config with  HyperFlash Devices (i.MX RT1050: Hello World Plus Lab). I haven’t this documentation with board i.MX RT1060 but I suppose that was the same.

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I verify the PCB SCH-31357 Rev. A2 and it’s true is QSPI select.

FlexSPI_D0_A R155 pin 5 U33 o R362 pin D3.

FlexSPI_D1_A R156 pin 5 U33 o R363 pin D2.

FlexSPI_D2_A R157 pin 5 U33 o R364 pin C4.

FlexSPI_D3_A R158 pin 5 U33 o R365 pin D4.

I think the problem is the communicaction, I read in other places to crate a new worhspace but the problem remain.

Hello sample in Flash:

MCUXpresso IDE RedlinkMulti Driver v10.2 (Jul 25 2018 11:25:37 - crt_emu_cm_redlink build 555)

Found chip XML file in C:/Dades/ws_Xpresso_Alstom/evkmimxrt1060_hello_world/Debug\MIMXRT1062xxxxA.xml

Reconnected to existing link server

Connecting to probe 1 core 0:0 (using server started externally) gave 'OK'

Probe Firmware: DAPLink CMSIS-DAP (ARM)

Serial Number:  0229000005d9b46c00000000000000000000000097969905

VID:PID:  0D28:0204

USB Path: \\?\hid#vid_0d28&pid_0204&mi_03#9&1ade6001&0&0000#{4d1e55b2-f16f-11cf-88cb-001111000030}

Using memory from core 0:0 after searching for a good core

debug interface type      = Cortex-M7 (DAP DP ID 0BD11477) over SWD TAP 0

processor type            = Cortex-M7 (CPU ID 00000C27) on DAP AP 0

number of h/w breakpoints = 8

number of flash patches   = 0

number of h/w watchpoints = 4

Probe(0): Connected&Reset. DpID: 0BD11477. CpuID: 00000C27. Info: <None>

Debug protocol: SWD. RTCK: Disabled. Vector catch: Disabled.

Content of CoreSight Debug ROM(s):

RBASE E00FD000: CID B105100D PID 000008E88C ROM dev (type 0x1)

ROM 1 E00FE000: CID B105100D PID 04000BB4C8 ROM dev (type 0x1)

ROM 2 E00FF000: CID B105100D PID 04000BB4C7 ROM dev (type 0x1)

ROM 3 E000E000: CID B105E00D PID 04000BB00C ChipIP dev SCS (type 0x0)

ROM 3 E0001000: CID B105E00D PID 04000BB002 ChipIP dev DWT (type 0x0)

ROM 3 E0002000: CID B105E00D PID 04000BB00E ChipIP dev (type 0x0)

ROM 3 E0000000: CID B105E00D PID 04000BB001 ChipIP dev ITM (type 0x0)

ROM 2 E0041000: CID B105900D PID 04001BB975 ARCH 23B:4A13r0 CoreSight dev type 0x13 Trace Source - core

ROM 2 E0042000: CID B105900D PID 04004BB906 CoreSight dev type 0x14 Debug Control - Trigger, e.g. ECT

ROM 1 E0040000: CID B105900D PID 04000BB9A9 CoreSight dev type 0x11 Trace Sink - TPIU

ROM 1 E0043000: CID B105F00D PID 04001BB101 System dev (type 0x0)

Inspected v.2 External Flash Device on SPI using SFDP JEDEC ID MIMXRT1060_SFDP_QSPI.cfx

Image 'iMXRT1060_SFDP_QSPI Jul 25 2018 11:28:21'

Opening flash driver MIMXRT1060_SFDP_QSPI.cfx

Sending VECTRESET to run flash driver

Flash variant 'JEDEC_SFDP_Device' detected (8MB = 128*64K at 0x60000000)

Closing flash driver MIMXRT1060_SFDP_QSPI.cfx

Non-standard DAP stride detected - 1024 bytes

NXP: MIMXRT1062xxxxA

Connected: was_reset=true. was_stopped=false

Awaiting telnet connection to port 3330 ...

GDB nonstop mode enabled

Opening flash driver MIMXRT1060_SFDP_QSPI.cfx (already resident)

Sending VECTRESET to run flash driver

Flash variant 'JEDEC_SFDP_Device' detected (8MB = 128*64K at 0x60000000)

Writing 24192 bytes to address 0x60000000 in Flash

Erased/Wrote page  0-0 with 24192 bytes in 1436msec

Closing flash driver MIMXRT1060_SFDP_QSPI.cfx

Flash Write Done

Flash Program Summary: 24192 bytes in 1.44 seconds (16.45 KB/sec)

Starting execution using system reset and halt target

flash - system reset failed - Ee(07). Bad ACK returned from status - wire error.

Target error from Commit Flash write: Ee(07). Bad ACK returned from status - wire error.

GDB stub (crt_emu_cm_redlink) terminating - GDB protocol problem: Pipe has been closed by GDB.

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To debug with P&E is enough to disconnet J49 and J50 and connect to JTAG J21?

Thank.

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jingpan
NXP TechSupport
NXP TechSupport

Hi,

RT1050-EVK and RT1060-EVK are not same. RT1050-EVKB use hyperflash as default flash. RT1060-EVK use QSPI as default flash.

Please read user guide. 

https://www.nxp.com/docs/en/user-guide/UM11151.PDF

NXP has put all RT1060 and RT1060-EVK documents on website. Please download these documents.

Regards,

Jing