Using MCUXpress config tool v12 with MIMXRT1062xxxxA and config SEMC with SDRAM the tool outputs only register settings and not higher level code. Seems like the tool is not enabling the SEMC clock? Why?
tatic void SEMC_init(void) {
/* SEMC general initialization */
SEMC->BR[0] = 0U;
SEMC->BR[1] = 0U;
SEMC->BR[2] = 0U;
SEMC->BR[3] = 0U;
SEMC->BR[4] = 0U;
SEMC->BR[5] = 0U;
SEMC->BR[6] = 0U;
SEMC->BR[7] = 0U;
SEMC->BR[8] = 0U;
#if defined(SEMC_BR9_INIT)
SEMC->BR9 = 0U;
#endif
#if defined(SEMC_BR10_INIT)
SEMC->BR10 = 0U;
#endif
#if defined(SEMC_BR11_INIT)
SEMC->BR11 = 0U;
#endif
/* Software reset for SEMC internal logical . */
SEMC->MCR = SEMC_MCR_SWRST_MASK;
while(0UL != (SEMC->MCR & SEMC_MCR_SWRST_MASK))
{
}
#if defined(SEMC_MCR_INIT)
SEMC->MCR = SEMC_MCR_INIT;
#endif
#if defined(SEMC_BMCR0_INIT)
SEMC->BMCR0 = SEMC_BMCR0_INIT;
#endif
#if defined(SEMC_BMCR1_INIT)
SEMC->BMCR1 = SEMC_BMCR1_INIT;
#endif
SEMC->MCR &= ~SEMC_MCR_MDIS_MASK;
/* SEMC SDRAM initialization */
#if defined(SEMC_BR0_INIT)
SEMC->BR[0] = SEMC_BR0_INIT;
#endif
#if defined(SEMC_BR1_INIT)
SEMC->BR[1] = SEMC_BR1_INIT;
#endif
#if defined(SEMC_BR2_INIT)
SEMC->BR[2] = SEMC_BR2_INIT;
#endif
#if defined(SEMC_BR3_INIT)
SEMC->BR[3] = SEMC_BR3_INIT;
#endif
#if defined(SEMC_SDRAMCR0_INIT)
SEMC->SDRAMCR0 = SEMC_SDRAMCR0_INIT;
#endif
#if defined(SEMC_IOCR_INIT)
SEMC->IOCR = SEMC_IOCR_INIT;
SEMC->IOCR &= ~SEMC_IOCR_MUX_A8_MASK;
#endif
#if defined(SEMC_DCCR_INIT)
SEMC->DCCR = SEMC_DCCR_INIT;
#endif
#if defined(SEMC_SDRAMCR1_INIT)
SEMC->SDRAMCR1 = SEMC_SDRAMCR1_INIT;
#endif
#if defined(SEMC_SDRAMCR2_INIT)
SEMC->SDRAMCR2 = SEMC_SDRAMCR2_INIT;
#endif
#if defined(SEMC_SDRAMCR3_INIT)
SEMC->SDRAMCR3 = SEMC_SDRAMCR3_INIT;
#endif
SEMC->IPCR1 = 0x2U;
SEMC->IPCR2 = 0x0U;
/* Precharge-All */
SEMC->INTR |= SEMC_INTR_IPCMDDONE_MASK;
#if defined(SEMC_IPCR0_INIT)
SEMC->IPCR0 = SEMC_IPCR0_INIT;
#endif
#if defined(SEMC_IPCMD_PRECHARGEALL_INIT)
SEMC->IPCMD = SEMC_IPCMD_PRECHARGEALL_INIT;
#endif
while (0x00U == (SEMC->INTR & (uint32_t)SEMC_INTR_IPCMDDONE_MASK))
{
}
SEMC->INTR |= SEMC_INTR_IPCMDDONE_MASK;
/* Auto-Refresh */
SEMC->INTR |= SEMC_INTR_IPCMDDONE_MASK;
#if defined(SEMC_IPCR0_INIT)
SEMC->IPCR0 = SEMC_IPCR0_INIT;
#endif
#if defined(SEMC_IPCMD_AUTOREFRESH_INIT)
SEMC->IPCMD = SEMC_IPCMD_AUTOREFRESH_INIT;
#endif
while (0x00U == (SEMC->INTR & (uint32_t)SEMC_INTR_IPCMDDONE_MASK))
{
}
SEMC->INTR |= SEMC_INTR_IPCMDDONE_MASK;
/* Auto-Refresh */
SEMC->INTR |= SEMC_INTR_IPCMDDONE_MASK;
#if defined(SEMC_IPCR0_INIT)
SEMC->IPCR0 = SEMC_IPCR0_INIT;
#endif
#if defined(SEMC_IPCMD_AUTOREFRESH_INIT)
SEMC->IPCMD = SEMC_IPCMD_AUTOREFRESH_INIT;
#endif
while (0x00U == (SEMC->INTR & (uint32_t)SEMC_INTR_IPCMDDONE_MASK))
{
}
SEMC->INTR |= SEMC_INTR_IPCMDDONE_MASK;
/* Mode setting */
SEMC->INTR |= SEMC_INTR_IPCMDDONE_MASK;
#if defined(SEMC_IPCR0_INIT)
SEMC->IPCR0 = SEMC_IPCR0_INIT;
#endif
#if defined(SEMC_IPTXDAT_INIT)
SEMC->IPTXDAT = SEMC_IPTXDAT_INIT;
#endif
#if defined(SEMC_IPCMD_MODESET_INIT)
SEMC->IPCMD = SEMC_IPCMD_MODESET_INIT;
#endif
while (0x00U == (SEMC->INTR & (uint32_t)SEMC_INTR_IPCMDDONE_MASK))
{
}
SEMC->INTR |= SEMC_INTR_IPCMDDONE_MASK;
/* Enable refresh */
SEMC->SDRAMCR3 |= SEMC_SDRAMCR3_REN_MASK;
}
Solved! Go to Solution.
HI @rmolde ,
This is the new function of V12. It only set SEMC register. Some people may like their code in this style.
You can select the second option. It is the traditional style and use driver to configure SEMC. Clock will be enabled in driver.
Regards,
Jing
HI @rmolde ,
This is the new function of V12. It only set SEMC register. Some people may like their code in this style.
You can select the second option. It is the traditional style and use driver to configure SEMC. Clock will be enabled in driver.
Regards,
Jing