I2S clock not exact but doesn't matter

[randylee]

I'm using an LPC5512 and MCUexpresso 11.5.1

I want an I2S channel out (with DMA) and want to put things out as 16 bit/chan 22050 (or there abouts) audio.

Using the config tools, I can set the clock for flexcomm4 to fro_1m and get an output of 705234 Hz (256000/363).  I2S config wants 705600 Hz so this clock rate is (for my application) close enough but the config tool is all bent out of shape for it and won't generate the init() function (or anything else around it) because of it.

How do I tell the tool that this is fine, use it anyway?

[Petr_H · Accepted solution]

Hi,

I suppose you refer to the error reported in the peripherals tool, that I seem to reproduce:

The problem in this component is that the tool is not able to work with the bit clock values lower than the required one (the divider results in <1, as mentioned in the error message).

If you want to use exactly this setup and ignore the little inaccuracy, you can change the Bit clock source frequency to 'custom value...' : 

and then set it to 705600:

This tells the tool that you cared for having there this value and the prescaler is calculated from this value. Please note that from this point, the tool doesn't care what is set in the clocks tool so if you modify the settings in clocks tool, you would need to modify it here again.

Regards

Petr Hradsky

Config Tools Team

[randylee]

Yah, this worked.  I'm OK with setting the clocks up "manually" here and the error involved here is a) small and b) doesn't matter in my application.

thanx

[xiangjun_rong]

Hi,

I suppose that you can use FRG to generate the bit clock of I2S.

You use 16 bits I2S format data, the sampling rate is 22.05kHz, so the required bit clock frequency is:

Bit clock frequency=22.05KHz*16*2=0.7056MHz

As the following fig, you can use the FRG to generate the 0.7056MHz I2S bit clock

The input clock of FRG is 1MHz, the required output clock is 0.7056mhz.

From the following figure, the DIV is fixed 0xFF, the MULT value will be

[(1MHz/0.7056MHz)-1]*255=106 in decimal, so it is okay you set the the register as:

SYSCON->FLEXCOMMCLKDIV[4]=0x6A<<8|0xFF;

Hope it can help you

BR

XiangJun Rong

[randylee]

The clocks tool set the FRG for that flexcomm as a multiplier of 256 and divisor of 363 when I asked for a particular frequency. It comes out to 705.234KHz that way.

In my application this is close enough.

The interesting thing here is that unless you're running with odd crystals or happen to have some integer relationship to that clock, you'll never get it exactly right.  The tool probably should allow for some sort of error (possibly set by the user) so that it doesn't fail when you're off a bit.. 

Thanx tho

BR

[Petr_H]

Yes, that's true that it's difficult or not possible to reach exact value and that the user may need to try to switch clock source or play with clocks tool setup or live with some inaccuracy.

If the frequency is at least equal or higher, the tool shows just a warning and the tools tries to suggest the user some close frequencies for the different internal dividers.

Here is an example when you switch to 12 MHz clock source for FlexCom4 in the clocks tool:

The red marker shows the suggested nearest frequencies to try, the resulting divider is in brackets.

Only in case the frequency is lower the request (I suppose because the internal divider becomes 0), the error is reported and the tool is stuck for the fix. Anyway, I'll forward it to the developers to check if we can improve it so it works in this case too without blocking the code generation.

Thank you for the feedback!

Regards

Petr Hradsky

Config Tools Team