Debug and Release config tool

[_Ferrari_]

Dear all,

I am developing a project that uses the LPC55S28JDB100 microprocessor.
In my project, CPU pins 12 and 13 are shared between the SWDIO and SWCLK pins, and the ADC0:CH2B and ADC0:CH1B pins.

Of course in DEBUG mode the PIN12 andd PIN13 must be defined as SWDIO and SWCLK while in RELEASE mode I have to define the above pins as ADC0:CH2B amd ADC0:CH1B.
To configure the pins I'm using PIN tool of MCUXpresso IDE v11.8.1_1197.
Is there any possibility to have two different configurations of the PIN TOOL first for DEBUG and the second for RELEASE ?

[Petr_H]

Hi,
You can use multiple functional groups in the Pins tool to define alternative pin routings and generate separate functions.

Open the functional groups dialog using the icon on the toolbar (see the following picture) and
add two function groups. For example InitPins_Release and InitPins_Debug.
Ensure that you uncheck the "Called by the defaut initialization".

Then, select the InitPins_Debug functional group and add there routing needed at debug time and similar way for the release case.

After you update the generated code, you the call the generated functions in the main module like this:

#ifdef DEBUG
InitPins_Debug();
#else
InitPins_Release();
#endif

best regards

Petr Hradsky

Config Tools Team

[Alice_Yang]

Hello @_Ferrari_ 

You can put the configuration code in one file, then enable or disable for Debug and release.

For example configure the pins as ADC function in adc_pin.c, only enable it in Release, exclude it in Debug,  this file only works on release . steps as below:

BR

Alice

[_Ferrari_]

Dear @Alice_Yang

Thank you fro your answer

You wrote

>You can put the configuration code in one file, then enable or disable for Debug and release.

Ok, I understand. It means that, in my case, I have to have two files:

fisrst file named i.e. PIN_MUX_DEBUG.C excluded from build in Release mode

second file named i.e. PIN_MUX_RELEASE.C excluded from build in Debug mode

Of course in the file PIN_MUX_DEBUG.C CPU pins 12 and 13 are defined as SWDIO and SWCLK

In the file PIN_MUX_RELEASE.C CPU pins 12 and 13 are defined as ADC0:CH2B and ADC0:CH1B

Is it correct ?

thank you very much for your help and cooperation

best regards

[Alice_Yang · Accepted solution]

Hello @_Ferrari_ 

Yes.

BR

Alice