ls1088 pci configuration

[ammtgunn]

Hi everyone,

I have a custom ls1088 board. I want to use pcie1(serdes2 laneA) connection as a wifi module. I change serdes registers based on "QorlQ ls1088 Referance Manual". Serdes2 protocol number is 20(decimal). Pci is working in RC mode. I dont change anything in dts file. (I try to change the pcie status but it doesnt effect anything, it always opens all pci buses)

my custom board dts is working correctly, i am just trying to add pci connection as a extra.

in u-boot i tried to check the pci connection and i saw something like that ->

=>

=> pci
Scanning PCI devices on bus 0
BusDevFun VendorId DeviceId Device Class Sub-Class
_____________________________________________________________
00.00.00 0x1957 0x80c0 Bridge device 0x04

i think that it is just the pci-bridge, not wifi connection. Is my configuration right? 

[ammtgunn · Accepted solution]

We solved the problem. Problem was in hardware. thank you for your helps. 

[ammtgunn]

 

U-Boot 2019.04 (Aug 26 2020 - 22:10:49 +0300)

SoC: LS1088AE Rev1.0 (0x87030010)
Clock Configuration:
CPU0(A53):1200 MHz CPU1(A53):1200 MHz CPU2(A53):1200 MHz
CPU3(A53):1200 MHz CPU4(A53):1200 MHz CPU5(A53):1200 MHz
CPU6(A53):1200 MHz CPU7(A53):1200 MHz
Bus: 500 MHz DDR: 1600 MT/s
Reset Configuration Word (RCW):
00000000: 30004014 00000030 00000000 00000000
00000010: 00000000 000a0000 00300000 00000000
00000020: 01c01150 00002580 00000000 00000040
00000030: 0000005b 00000000 00002403 00000000
00000040: 00000000 00000000 00000000 00000000
00000050: 00000000 00000000 00000000 00000000
00000060: 00000000 00000000 00000000 000009e7
00000070: 33110005 00807755
PCA: failed to select proper channel
PCA: failed to select proper channel
core voltage not adjusted
DRAM: 3.9 GiB
DDR 3.9 GiB (DDR4, 64-bit, CL=11, ECC on)
PCA: failed to select proper channel
PCA: failed to select proper channel
PCA: failed to select proper channel
Using SERDES1 Protocol: 21 (0x15)
Using SERDES2 Protocol: 20 (0x14)
NAND: 512 MiB
MMC: FSL_SDHC: 0
Loading Environment from MMC... *** Warning - bad CRC, using default environment

Model: NXP Layerscape 1088a RDB Board
Board: LS1088A-RDB, Board Arch: V15, Board version: P, boot from SD card
QSPI:EMU
CPLD: v255.255
SERDES1 Reference : Clock1 = 100 separate SSCGMHz Clock2 = 100 separate SSCGMHz
SERDES2 Reference : Clock1 = 100 separate SSCGMHz Clock2 = 100 separate SSCGMHz
Net: SerDes1 protocol 0x15 is not supported on LS1088ARDB
PCIe0: pcie@3400000 Root Complex: no link
PCIe1: pcie@3500000 Root Complex: no link
PCIe2: pcie@3600000 Root Complex: no link

I'm sorry for the late reply. here is the schematic and u-boot log .

[ufedor]

Please provide the processor connection schematics as PDF.

[ammtgunn]

Sorry for late answer.

[ammtgunn]

i dont have schematics right now. only can share u-boot log -->

Using SERDES2 Protocol: 20 (0x14)

...

SERDES2 Reference : Clock1 = 100 separate SSCGMHz Clock2 = 100 separate SSCGMHz

...

PCIe0: pcie@3400000 Root Complex: no link
PCIe1: pcie@3500000 Root Complex: no link
PCIe2: pcie@3600000 Root Complex: no link

[ammtgunn]

Reset Configuration Word (RCW):
00000000: 30004014 00000030 00000000 00000000
00000010: 00000000 000a0000 00300000 00000000
00000020: 01c01150 00002580 00000000 00000000
00000030: 0000004b 00000000 00002403 00000000
00000040: 00000000 00000000 00000000 00000000
00000050: 00000000 00000000 00000000 00000000
00000060: 00000000 00000000 00000000 000009e7
00000070: 33110009 00807755

[ufedor]

Schematics is required.

[ufedor]

Please provide the processor connection schematics as PDF and U-Boot log showing RCW.