ls1046a uboot nand flash fail ..?

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ls1046a uboot nand flash fail ..?

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hongyuanz
Contributor IV

Use flexbuild_lsdk2108 development environment  

nand  flash  hardware :  S34MS08G200BH_BGA63P

uboot test nand write command failed    ..?

log :

=> nand write 0xa0000000 0 100

NAND write: device 0 offset 0x0, size 0x100
fsl-ifc: NAND Flash ECC Uncorrectable Error
NAND write to offset 0 failed -5
0 bytes written: ERROR
=> nand erase 0 100

NAND erase: device 0 offset 0x0, size 0x100
Erasing at 0x0 -- 100% complete.
OK
=> nand write 0xa0000000 0 10

NAND write: device 0 offset 0x0, size 0x10
fsl-ifc: NAND Flash ECC Uncorrectable Error
NAND write to offset 0 failed -5
0 bytes written: ERROR
=>

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yipingwang
NXP TechSupport
NXP TechSupport

Please modify IFC NAND timing configuration in components/firmware/uboot/include/configs/ls1046ardb.h according to your target board.

#define CONFIG_SYS_NAND_CSPR_EXT (0x0)
#define CONFIG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \
| CSPR_PORT_SIZE_8 \
| CSPR_MSEL_NAND \
| CSPR_V)
#define CONFIG_SYS_NAND_AMASK IFC_AMASK(64 * 1024)
#define CONFIG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \
| CSOR_NAND_ECC_DEC_EN /* ECC on decode */ \
| CSOR_NAND_ECC_MODE_8 /* 8-bit ECC */ \
| CSOR_NAND_RAL_3 /* RAL = 3 Bytes */ \
| CSOR_NAND_PGS_4K /* Page Size = 4K */ \
| CSOR_NAND_SPRZ_224 /* Spare size = 224 */ \
| CSOR_NAND_PB(64)) /* 64 Pages Per Block */

#define CONFIG_SYS_NAND_ONFI_DETECTION

#define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x7) | \
FTIM0_NAND_TWP(0x18) | \
FTIM0_NAND_TWCHT(0x7) | \
FTIM0_NAND_TWH(0xa))
#define CONFIG_SYS_NAND_FTIM1 (FTIM1_NAND_TADLE(0x32) | \
FTIM1_NAND_TWBE(0x39) | \
FTIM1_NAND_TRR(0xe) | \
FTIM1_NAND_TRP(0x18))
#define CONFIG_SYS_NAND_FTIM2 (FTIM2_NAND_TRAD(0xf) | \
FTIM2_NAND_TREH(0xa) | \
FTIM2_NAND_TWHRE(0x1e))
#define CONFIG_SYS_NAND_FTIM3 0x0

Please refer to https://community.nxp.com/t5/Layerscape-Knowledge-Base/IFC-Controller-Configuration-on-QorIQ-Custom-...

Then remove folder build/firmware/u-boot/, rebuild atf image.