eMMC/SDHC read speed on LS1043A

[thomasww]

I'm trying to measure the speed of the SDHC memory card slot of the LS1043A evaluation board, but for some reason I can't get faster than ~13MB/s. Is this the maximum? In UBoot, it seems there is no possibility to set it to more than 4 bit bus width either. The processor itself should support an embedded eMMC 4.5 card in 8 bit mode, which should support HS200 mode according to the datasheet. Is there a manual/tutorial where I can find the correct setup? I'm guessing I'm doing something wrong... The card used for the test is an UHS1 card with 80MB/s device (measured in a PC). The on board flash memory has similar speeds as well.

[pro-supportengi]

Consider contacting your NXP FAE and requesting a possible driver bug to be triaged by NXP. If you don't have a Professional Services contract in place, consider adding a Service contract to help address issues like this. Have to isolate if it is a driver issue in SDK 2.0 or an LS1043A SDHC/SD interface issue.  Likely a driver issue showing up in both the U-boot and kernel drivers.

If you are concerned with boot performance, rootfs should be mounted from SD and not booted from NOR because of IFS/NOR read performance and rootfs should not be included in the .its and the .itb image.

[thomasww]

Thank you, I will request an NXP FAE help in this case.

[eriktideman · Accepted solution]

Hi,

These are the numbers I got from writing/reading 1GB of raw data to sd card Sandisk Extreme Pro 512GB(95MB/s) on the ls1043a-rdb eval board using linux kernel 4.1.8 from SDK-2.0:

WRITE:

Command: dd if=/dev/zero of=/dev/mmcblk0 bs=1M count=1000

=> 7.3MB/s

READ:

Command: dd if=/dev/mmcblk0 of=/dev/null bs=1M count=1000

=> 8.0MB/s

Also, almost identical results with kernel 3.19.3 from SDK-0.5. The numbers are terrible, read/write should be around ten times higher. The same test on imx6 soloX gave us 70.6MB/s.

[thomasww]

In my case, at the u-boot:

U-Boot 2015.01QorIQ-SDK-V1.7+gc297f5b (Dec 20 2015 - 13:08:26) aarch64-fsl-linux-gcc (Linaro GCC 4.8-2014.04) 4.8.3 20140401 (prerelease) GNU ld (GNU Binutils) 2.24.0.20140311 Linaro 2014.03

the 'mmc info' command gives:

Device: FSL_SDHC

Manufacturer ID: 3

OEM: 5344

Name: SE32G

Tran Speed: 50000000

Rd Block Len: 512

SD version 3.0

High Capacity: Yes

Capacity: 29.7 GiB

Bus Width: 4-bit

Copying the kernel image with 'ext2load' command also gives similar results to yours:

32413675 bytes read in 3441 ms (9 MiB/s)

Kernel version:

Linux ls1043ardb 4.1.8-rt8+gbd51baf #1 SMP Tue Aug 9 14:49:09 CEST 2016

aarch64 GNU/Linux

imx6 has eMMC4.4 interface, the LS1043 has eMMC4.5 (which includes HS200 support), but it's still slower for some reason... Have you tried checking the drivers? As I see, uboot sources does not contain any reference to the 8 bit mode. I have not started digging the kernel sources yet (and I hope I won't have to).

[Pavel]

Usually Linux driver provides all possibility for peripherals.

U-boot is boot loader. Driver for u-boot provides code loading.

Therefore it supports only a few modes of the eMMC.

It is similar to as requirement for the BIOS of the PC for providing maximum speed for USB or SATA.

Have a great day,
Pavel Chubakov

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[thomasww]

Dear Pavel,

I'm aware of the functionality of the U-Boot. I was trying to read the source code, in order to find what kind of operating modes are really supported, and what do I have to do to activate the maximum speed, but I haven't seen anything referring even to the 8 bit mode of the eMMC or anything about the high speed modes... The read speed is about 13MB/s max, the write is 9, regardless of what I'm trying to adjust. I've found the 4 bit mode part of the driver in the kernel source, but that's not what I'm searching for.

can you help me verify my results? or even better, can you give me some hint about the highest speed supported with the current kernel drivers with the LS1043A? The detailed hardware datasheet states 8 bit eMMC 4.5 and DDR52/HS200 are supported.

thank you,

Thomas