According to the reference manual for LS1046A( Rev. 2.1), the base address of 3 MSI registers are listed below.
158_1000 | Shared Message Signaled Interrupt Index Register (SCFG_G0MSIIR) |
159_2000 | Shared Message Signaled Interrupt Index Register (SCFG_G1MSIIR) |
15A_3000 | Shared Message Signaled Interrupt Index Register (SCFG_G2MSIIR) |
But somehow I notice that the address from your linux dts file doesn't match those from your reference manual. Any clue of this?
msi1: msi-controller@1580000 { compatible = "fsl,ls1046a-msi"; msi-controller; reg = <0x0 0x1580000 0x0 0x10000>; interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; }; msi2: msi-controller@1590000 { compatible = "fsl,ls1046a-msi"; msi-controller; reg = <0x0 0x1590000 0x0 0x10000>; interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; }; msi3: msi-controller@15a0000 { compatible = "fsl,ls1046a-msi"; msi-controller; reg = <0x0 0x15a0000 0x0 0x10000>; interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; };
Thanks,
Yong
Hi
could you elaborate a bit on the part of shadow registers of MSI registers since It is not even menteiond in your manual. Do you have a doc in somewhere to describe this?
Can we consider that all MSI registers are mapped to both address? for example, we can choose either 0x1581000 or 0x158000 to access the same register on MSI1.
0x1581000 <--> 0x1580000 (MSI1)
0x1592000 <--> 0x1590000 (MSI2)
0x15a3000 <--> 0x15a0000 (MSI3)
Thanks a lot!