Watchdog reboot status on LS1028ARDB

[igor_franco]

Hello,

I developed a program to manage the Watchdog for both cores on the LS1028ARDB. This program creates a thread for each core to send the keep alive. When I kill it, the board reboots after the time configured. There is no problem in the execution.

However, my application must know when the reboot was caused by Watchdog (when the keepalive stops). Is there a way (driver, Linux file, etc.) to differ a normal reboot (software reset or shutdown) from a Watchdog reset?

I've found some registers on the "QorIQ LS1028A Reference Manual" but nothing changes when the reboot is for Watchdog.

Thank you in advance,

Igor 

[igor_franco]

Hello ufedor,

I think I have only this option. Fortunately, the custom board that we will use with this processor has a MCU. 

Thank you for the answer!

Igor 

[ufedor · Accepted solution]

Please consider that all the processor's registers are initialized during reset.
Possible solution is to use external FPGA/CPLD catching the RESET_REQ_B assertion and reading the processor's RSTRQSR1 before asserting PORESET_B to the processor.