Using EDMA for PCIE in lS1043A

[Naveenkumar_Muthusamy]

Hi all,

we are using 3 instances of Pcie in our system. as per our system needs we need to use DMA. we needs to know how to enable the DMA. 

how to enable? whether it needs to be added on Device tree or how it needs to be done?

we are usinf ls1043ardb board and we are using yocto-real-time-edge BSP,

i have checked device tree and there is no dma-ranges mentioned under any of the Pcie nodes.

below is the device tree under fsl-ls1043a.dtsi

"pcie1: pcie@3400000 {
compatible = "fsl,ls1043a-pcie";
reg = <0x00 0x03400000 0x0 0x00100000>, /* controller registers */
<0x40 0x00000000 0x0 0x00002000>; /* configuration space */
reg-names = "regs", "config";
interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "pme", "aer";
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
iommu-map = <0 &smmu 0 1>; /* update by bootloader */
num-viewport = <6>;
bus-range = <0x0 0xff>;
ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
msi-parent = <&msi1>, <&msi2>, <&msi3>;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0000 0 0 1 &gic 0 110 0x4>,
<0000 0 0 2 &gic 0 111 0x4>,
<0000 0 0 3 &gic 0 112 0x4>,
<0000 0 0 4 &gic 0 113 0x4>;
fsl,pcie-scfg = <&scfg 0>;
big-endian;
status = "okay";
};

pcie2: pcie@3500000 {
compatible = "fsl,ls1043a-pcie";
reg = <0x00 0x03500000 0x0 0x00100000>, /* controller registers */
<0x48 0x00000000 0x0 0x00002000>; /* configuration space */
reg-names = "regs", "config";
interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "pme", "aer";
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
iommu-map = <0 &smmu 0 1>; /* update by bootloader */
num-viewport = <6>;
bus-range = <0x0 0xff>;
ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */
0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
msi-parent = <&msi1>, <&msi2>, <&msi3>;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0000 0 0 1 &gic 0 120 0x4>,
<0000 0 0 2 &gic 0 121 0x4>,
<0000 0 0 3 &gic 0 122 0x4>,
<0000 0 0 4 &gic 0 123 0x4>;
fsl,pcie-scfg = <&scfg 1>;
big-endian;
status = "okay";
};

pcie3: pcie@3600000 {
compatible = "fsl,ls1043a-pcie";
reg = <0x00 0x03600000 0x0 0x00100000>, /* controller registers */
<0x50 0x00000000 0x0 0x00002000>; /* configuration space */
reg-names = "regs", "config";
interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "pme", "aer";
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
iommu-map = <0 &smmu 0 1>; /* update by bootloader */
num-viewport = <6>;
bus-range = <0x0 0xff>;
ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000 /* downstream I/O */
0x82000000 0x0 0x40000000 0x50 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
msi-parent = <&msi1>, <&msi2>, <&msi3>;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0000 0 0 1 &gic 0 154 0x4>,
<0000 0 0 2 &gic 0 155 0x4>,
<0000 0 0 3 &gic 0 156 0x4>,
<0000 0 0 4 &gic 0 157 0x4>;
fsl,pcie-scfg = <&scfg 2>;
big-endian;
status = "okay";
}; "

so let me know how to do it.

#ls1043a 

[LFGP]

dear @Naveenkumar_Muthusamy 

The apps team has sent the below information:

For qDMA on ls1043a, there is no need to add a DMA range in pcie node, only the qDMA node in device tree is required.
To enable qDMA, refer to LSDKUG Chapter 7.2.11 "QDMA for platform with DPAA1" part for the necessary kernel configuration.
The customer can enable CONFIG_DMATEST=y and use the kernel dmatest to verify qDMA functionality. By default, the test performs memory-to-memory transfers. The test commands can be found in Chapter 7.2.11.
I will provide a patch for memory-to-pcie testing. Note the patch version may differ from the customer's kernel, so they need to port it accordingly. The user must assign a pcie physical address to qDMA, then qDMA will transfer the data from memory to pcie. From a DMA perspective, there is no difference between memory and pcie -- they are both treated as physical addresses.
The below commands are needed for memory-to-pcie transfer:
echo 0x4841800000 > /sys/module/dmatest/parameters/pci_phys_addr # need change to customer's pcie address
echo 1 > /sys/module/dmatest/parameters/dmatest_pcie
Then, follow the test procedure described in Chapter 7.2.11.
Once the test passes, the customer can refer to the interface usage in dmatest.c and integrated relevant code into their files.

review the attached file please.

BR

LFGP