SPI time delay between bytes adjust action consultation

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SPI time delay between bytes adjust action consultation

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jack_huang1
Contributor IV

Dear;

         This project adopts the LS1043A platform and uses SPI interface to communicate with external devices, and meets an SPI problem:
One of the SPI devices has the following requirements for timing, requiring the delay between byte to be less than 400ns, as shown in Figure 1.
The timing diagram is as follows, and the delay between byte is 1us, see Figure 2 for details.

        After viewing the code, it is found that because the buffer sent at one time is 24bit (the chip manual requirements), 24 is a multiple of 8 in the code (not a multiple of 16 and 32), so the code is divided into 3 cycles to send 8bit operations in turn, and the delay is brought by separate transmission.
In this case, is there any way to adjust the latency between bytes?
         Check the parameter Delay after Transfer Prescaler in the LS1043ARM manual. How do I configure the parameter?

            Thank you!

 

 

 

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Hector_Villarruel
NXP TechSupport
NXP TechSupport

Hello @jack_huang1 

Could you please provide us with more information of which SPI device are you trying to connect?

We will be aware of your kind reply.

BR,

Hector Villarruel.

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12,405 次查看
jack_huang1
Contributor IV

Dear;          

       The SPI interconnects with the Tranceiver ADI adrv902x.  The description of the SPI interface is timely, as shown in the following screenshot. Please check. tINT indicates the delay between Byte and Byte. The maximum value is 400ns. See attachment for SPI description of the device. Thank you!          

 

         Best Regards!

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Hector_Villarruel
NXP TechSupport
NXP TechSupport

Hello @jack_huang1 

Hope this post finds you well,

Based on your last reply, since you are sending 8 bits,

Could you please provide us in how you are doing the SPI communication on the example that you provide us?

We will be aware for your kind reply.

BR,

Hector V

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12,337 次查看
jack_huang1
Contributor IV

Dear

      The spi call procedure is as follows:

jack_huang1_0-1720409933316.jpeg

jack_huang1_1-1720409974002.jpeg

 

        As shown above, the bits_per_word field value in the _read_xmit struct is assigned a default value of 8.

         What other information do you need? Thank you!

     

         Best Regards!

 

 

 

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Hector_Villarruel
NXP TechSupport
NXP TechSupport

Hello @jack_huang1 

Hope this post finds you well,

Reviewing your procedure, we notice that you are using SPI dev, which is handled by making transitions defined of 8 bits.

In order to modify this configuration to the 24 bit transitions, you have to modify it on the device tree.

Have a great day.

BR,

Hector Villarruel

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