Dear;
This project adopts the LS1043A platform and uses SPI interface to communicate with external devices, and meets an SPI problem:
One of the SPI devices has the following requirements for timing, requiring the delay between byte to be less than 400ns, as shown in Figure 1.
The timing diagram is as follows, and the delay between byte is 1us, see Figure 2 for details.
After viewing the code, it is found that because the buffer sent at one time is 24bit (the chip manual requirements), 24 is a multiple of 8 in the code (not a multiple of 16 and 32), so the code is divided into 3 cycles to send 8bit operations in turn, and the delay is brought by separate transmission.
In this case, is there any way to adjust the latency between bytes?
Check the parameter Delay after Transfer Prescaler in the LS1043ARM manual. How do I configure the parameter?
Thank you!