Reset signal on MK20DX128VFM5 of ls1021a

[jiye]

Hi,

Today when I review the schematic of the ls1021a-twr eva board I found a MCU that generates the K20_TRST_B_18 which cause the CPLD to trigger a reset signal called CPU_TRST_18, this one is going to the ls1012a processor TRST line. I believe this line is used for JTAG detection purpose. But I could not find any source codes of this MCU MK20DX128VFM5. Does any one know where to find the source code of this MCU because I want to know what us the MCU doing when there is a jtag reset has been triggered

[ufedor]

The Kinetis K20 is used to implement CMSIS-DAP which is not required for the LS1021A operation - i.e. it is an option specific for the development board. There is no need to copy the CMSIS_DAP in the custom designs, so its implementation details are not provided.

[jiye]

By saying that, CPU_TRST_B should not be considered as well? It triggers TRST on the CPU

[ufedor]

Not correct.

PORESET_B has to be used to generate the TRST_B.