Reg : Ethernet Accelerated Switching via fast path support on LS1043A

[CGganesh]

Hi,

Related to LS1043A pls clarify below points,

1. Does LS1043A support Wi-Fi 6e/7 to Ethernet Accelerated Switching via fast path [ DPAA ] without trapping frames to CPU [ARM Cortex ]

2. If not, does any alternative chipset of NXP support such a configuration ?

3. In case LS1043A, does all Wi-Fi traffic necessarily need to ARM cortex cores ?

4. Does LS 1043 A support IPv4 NAT and GRE encap in fast path ?

5. In DPAA, is it possible to add custom logic within the fast path ?

By,

Ganesh

[LFGP]

1. Does LS1043A support Wi-Fi 6e/7 to Ethernet Accelerated Switching via fast path [ DPAA ] without trapping frames to CPU [ARM Cortex ]

Ans: Yes, it has support and it will works as you describe in your question, as long as you use some NXP WiFi device.

2. If not, does any alternative chipset of NXP support such a configuration ?
3. In case LS1043A, does all Wi-Fi traffic necessarily need to ARM cortex cores ?

Ans: no

4. Does LS 1043 A support IPv4 NAT and GRE encap in fast path ?

Ans: Unfortunately the LS1043A not support neither NAT or GRE encap, the NAT encap is supported in the DPAA2 (i.e. LS1048 or LS1088)

5. In DPAA, is it possible to add custom logic within the fast path ?

You can develop your own driver fixed to your necessities using the DPAA functionalities.  

[giraffe508]

Hello Ganesh,

Regarding your questions about the LS1043A and its capabilities:

1. The LS1043A does not have built-in Wi-Fi support. It is primarily an Ethernet-based processor with DPAA (Data Path Acceleration Architecture) for fast path processing. To implement Wi-Fi 6e/7, you would need to use an external Wi-Fi chipset and connect it to the LS1043A via PCIe or another supported interface. The DPAA can still be used for Ethernet Accelerated Switching, but the Wi-Fi frames would need to be processed by the external Wi-Fi chipset.

2. NXP does not currently offer a chipset that directly supports Wi-Fi 6e/7 with Ethernet Accelerated Switching via fast path (DPAA) without trapping frames to the CPU. You would need to use an external Wi-Fi chipset in combination with an NXP processor like the LS1043A.

3. In the case of the LS1043A, Wi-Fi traffic would need to be processed by the external Wi-Fi chipset and then forwarded to the LS1043A for further processing by the ARM Cortex cores if necessary.

4. The LS1043A does support IPv4 NAT and GRE encapsulation in the fast path. You can find more information about the DPAA capabilities in the LS1043A Reference Manual (Section 9.3.4.1 for NAT and Section 9.3.4.2 for GRE).

5. Adding custom logic within the fast path of the DPAA is not directly supported. However, you can implement custom processing rules and configurations using the FMAN (Frame Manager) and the PCD (Parse-Classify-Distribute) engine. More details can be found in the LS1043A Reference Manual (Section 9.3.3).

I hope this information helps you in understanding the capabilities of the LS1043A and its usage with Wi-Fi and Ethernet Accelerated Switching.

Best regards,

[CGganesh]

Hi,

Thanks for your comment,

Can you please provide reply for below further queries, 

1. Does any other NXP SoC with Wi-Fi support have this accelerated Wifi-ethernet support if not LS1043A ?
2. Secondly, this and similar links seem to indicate that the frames do not need not  go through CPU – since they are referring to Gigiabit throughputs.

https://kommunikasjon.ntb.no/pressemelding/quantenna-partners-with-nxp-on-wi-fi-6-solutions?publishe...

A line therein mentions …

“ Our software and hardware solutions enable gigabit-class networking while freeing up CPU headroom to run new value-added services “\

Could NXP please clarify on this Wi-Fi to ethernet acceleration

By

Ganesh