MC34VR500 hard-coded internal configuration for LS1021A

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MC34VR500 hard-coded internal configuration for LS1021A

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deepaknaiknavar
Contributor II

Hello,

I was looking into MC34VR500V3ES PMIC for powering LS1021A.

This chip has a hardcoded configuration for DDR 4 VTT termination of 0.6V which can eliminate my I2C requirement.

But this does not provide the 1.35V (X1VDD, required for Serdes) on any outputs.

I assume i need to use an external LDO for 1.35V if i do not use I2C. Is it correct?

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r8070z
NXP TechSupport
NXP TechSupport

Have a great day,

Yes, it is correct.

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566 Views
r8070z
NXP TechSupport
NXP TechSupport

Have a great day,

Yes, it is correct.

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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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deepaknaiknavar
Contributor II

Thanks Serguei !!

I was having another question- why the PMIC (MC34VR500V3ES) does not provide 1.35V in hard coded config that is required for the serdes supply.

I had this question because i believe it is a customized chip for LS1021A with DDR4 interface and ideally should not need additional LDO.

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