LX2160ARDB rev.2 Trust Zone not working?

[sevseev]

We are trying to use Trust Zone on LX2160ARDB rev.2 boards, LSDK-21.08. Building BL2 and BL31 referencing optee binary image seemingly worked ok, no errors reported. However, when we boot the board it reports

ERROR: Error initializing runtime service opteed_fast

Boot process then successfully continues into the Linux command prompt. Does anyone have any suggestions what is the meaning of this message? How can it be dealt with? Googling did not bring any leads.

Thanks!

[yipingwang · Accepted solution]

I didn't reproduce this issue on my LX2160ARDB rev.2 target board, please refer to the following procedure to build optee-os into ATF.

1. In configs/sdk.yml

 OPTEE: y

2. Build optee-os, optee-client and optee-test

$ flex-builder -c optee -m lx2160ardb_rev2

3. Rebuild atf with optee-os included in fip.bin

$ flex-builder -c atf -m lx2160ardb_rev2 -b xspi

4. Please reprogram build/firmware/atf/lx2160ardb_rev2/fip_uboot.bin(bl2_flexspi_nor.pbl) on the target board. 

I attached my atf image to you, please deploy fip_uboot.bin at 0x100000, bl2_flexspi_nor.pbl at 0x0 on FlexSPI on your target board.

Please refer to my console log as the following.

U-Boot 2021.04-ge2eba0cd58 (Aug 27 2021 - 22:24:12 +0800)

SoC: LX2160ACE Rev2.0 (0x87360020)
Clock Configuration:
CPU0(A72):2200 MHz CPU1(A72):2200 MHz CPU2(A72):2200 MHz
CPU3(A72):2200 MHz CPU4(A72):2200 MHz CPU5(A72):2200 MHz
CPU6(A72):2200 MHz CPU7(A72):2200 MHz CPU8(A72):2200 MHz
CPU9(A72):2200 MHz CPU10(A72):2200 MHz CPU11(A72):2200 MHz
CPU12(A72):2200 MHz CPU13(A72):2200 MHz CPU14(A72):2200 MHz
CPU15(A72):2200 MHz
Bus: 750 MHz DDR: 3200 MT/s
Reset Configuration Word (RCW):
00000000: 5883833c 24580058 00000000 00000000
00000010: 00000000 0c010000 00000000 00000000
00000020: 036001a0 00002580 00000000 00000096
00000030: 00000000 00000000 00000000 00000000
00000040: 00000000 00000000 00000000 00000000
00000050: 00000000 00000000 00000000 00000000
00000060: 00000000 00000000 00027000 00000000
00000070: 08b30010 00150020
Model: NXP Layerscape LX2160ARDB Board
Board: LX2160ACE Rev2.0-RDB, Board version: C, boot from FlexSPI DEV#0
FPGA: v9.0
SERDES1 Reference: Clock1 = 161.13MHz Clock2 = 161.13MHz
SERDES2 Reference: Clock1 = 100MHz Clock2 = 100MHz
SERDES3 Reference: Clock1 = 100MHz Clock2 = 100MHz
VID: Core voltage after adjustment is at 800 mV
DRAM: 31.9 GiB
DDR 31.9 GiB (DDR4, 64-bit, CL=22, ECC on)
DDR Controller Interleaving Mode: 256B
DDR Chip-Select Interleaving Mode: CS0+CS1
QSFP: detected Fiberstore QSFP-SR4-40G s/n: G1804130068 mfgdt: 20/18/05
Using SERDES1 Protocol: 19 (0x13)
Using SERDES2 Protocol: 5 (0x5)
Using SERDES3 Protocol: 2 (0x2)
PCIe1: pcie@3400000 disabled
PCIe2: pcie@3500000 disabled
PCIe3: pcie@3600000 Root Complex: x1 gen1
PCIe4: pcie@3700000 disabled
PCIe5: pcie@3800000 Root Complex: no link
PCIe6: pcie@3900000 disabled
WDT: Started with servicing (30s timeout)
MMC: FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from SPIFlash... SF: Detected mt35xu512aba with page size 256 Bytes, erase size 128 KiB, total 64 MiB
OK
EEPROM: NXID v1
In: serial_pl01x
Out: serial_pl01x
Err: serial_pl01x
SEC0: RNG instantiated
Net: mdio@8b97000:0 is connected to DPMAC5@25g-aui. Reconnecting to DPMAC6@25g-aui
e1000: 00:15:17:be:d7:83
eth0: DPMAC2@xlaui4, eth1: DPMAC3@usxgmii, eth2: DPMAC4@usxgmii, eth3: DPMAC5@25g-aui, eth4: DPMAC6@25g-aui, eth5: DPMAC17@rgmii-id, eth6: DPMAC18@rgmii-id, eth7: e1000#0 [PRIME]
SF: Detected mt35xu512aba with page size 256 Bytes, erase size 128 KiB, total 64 MiB
device 0 offset 0x640000, size 0x80000
SF: 524288 bytes @ 0x640000 Read: OK
device 0 offset 0xa00000, size 0x300000
SF: 3145728 bytes @ 0xa00000 Read: OK
device 0 offset 0xe00000, size 0x100000
SF: 1048576 bytes @ 0xe00000 Read: OK
crc32+
fsl-mc: Booting Management Complex ... SUCCESS
fsl-mc: Management Complex booted (version: 10.28.1, boot status: 0x1)
Hit any key to stop autoboot: 0
=> tftp 0xa0000000 nxa22585/lx2160ardb/fip_uboot.bin
Using e1000#0 device
TFTP from server 192.168.2.1; our IP address is 192.168.3.207
Filename 'nxa22585/lx2160ardb/fip_uboot.bin'.
Load address: 0xa0000000
Loading: #################################################################
####################################
8.5 MiB/s
done
Bytes transferred = 1473799 (167d07 hex)
=> sf probe 0:1
SF: Detected mt35xu512aba with page size 256 Bytes, erase size 128 KiB, total 64 MiB
=> sf erase 0x100000 +$filesize
SF: 1572864 bytes @ 0x100000 Erased: OK
=> sf write 0xa0000000 0x100000 $filesize
device 0 offset 0x100000, size 0x167d07
SF: 1473799 bytes @ 0x100000 Written: OK
=> qixis_reset altbank
=> NOTICE: BL2: v2.4(release):LSDK-21.08-0-g340b20bcb-dirty
NOTICE: BL2: Built : 11:08:16, Apr 15 2022
NOTICE: UDIMM 18ADF2G72AZ-3G2E1
NOTICE: DDR PMU Hardware version-0x1210
NOTICE: DDR PMU Firmware vision-0x1001 (vA-2019.04)
NOTICE: DDR4 UDIMM with 2-rank 64-bit bus (x8)

NOTICE: 32 GB DDR4, 64-bit, CL=22, ECC on, 256B, CS0+CS1
NOTICE: BL2: Booting BL31
NOTICE: BL31: v2.4(release):LSDK-21.08-0-g340b20bcb-dirty
NOTICE: BL31: Built : 11:08:16, Apr 15 2022
NOTICE: Welcome to lx2160ardb BL31 Phase

U-Boot 2021.04 (Apr 13 2022 - 12:04:50 +0800)

SoC: LX2160ACE Rev2.0 (0x87360020)
Clock Configuration:
CPU0(A72):2200 MHz CPU1(A72):2200 MHz CPU2(A72):2200 MHz
CPU3(A72):2200 MHz CPU4(A72):2200 MHz CPU5(A72):2200 MHz
CPU6(A72):2200 MHz CPU7(A72):2200 MHz CPU8(A72):2200 MHz
CPU9(A72):2200 MHz CPU10(A72):2200 MHz CPU11(A72):2200 MHz
CPU12(A72):2200 MHz CPU13(A72):2200 MHz CPU14(A72):2200 MHz
CPU15(A72):2200 MHz
Bus: 750 MHz DDR: 3200 MT/s
Reset Configuration Word (RCW):
00000000: 5883833c 24580058 00000000 00000000
00000010: 00000000 0c010000 00000000 00000000
00000020: 036001a0 00002580 00000000 00000096
00000030: 00000000 00000000 00000000 00000000
00000040: 00000000 00000000 00000000 00000000
00000050: 00000000 00000000 00000000 00000000
00000060: 00000000 00000000 00027000 00000000
00000070: 08b30010 00150020
Model: NXP Layerscape LX2160ARDB Board
Board: LX2160ACE Rev2.0-RDB, Board version: C, boot from FlexSPI DEV#1
FPGA: v9.0
SERDES1 Reference: Clock1 = 161.13MHz Clock2 = 161.13MHz
SERDES2 Reference: Clock1 = 100MHz Clock2 = 100MHz
SERDES3 Reference: Clock1 = 100MHz Clock2 = 100MHz
VID: Core voltage after adjustment is at 800 mV
DRAM: 31.9 GiB
DDR 31.9 GiB (DDR4, 64-bit, CL=22, ECC on)
DDR Controller Interleaving Mode: 256B
DDR Chip-Select Interleaving Mode: CS0+CS1
QSFP: detected Fiberstore QSFP-SR4-40G s/n: G1804130068 mfgdt: 20/18/05
Using SERDES1 Protocol: 19 (0x13)
Using SERDES2 Protocol: 5 (0x5)
Using SERDES3 Protocol: 2 (0x2)
PCIe1: pcie@3400000 disabled
PCIe2: pcie@3500000 disabled
PCIe3: pcie@3600000 Root Complex: x1 gen1
PCIe4: pcie@3700000 disabled
PCIe5: pcie@3800000 Root Complex: no link
PCIe6: pcie@3900000 disabled
WDT: Started with servicing (30s timeout)
MMC: FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from SPIFlash... SF: Detected mt35xu512aba with page size 256 Bytes, erase size 128 KiB, total 64 MiB
OK
EEPROM: NXID v1
In: serial_pl01x
Out: serial_pl01x
Err: serial_pl01x
SEC0: RNG instantiated
Net: mdio@8b97000:0 is connected to DPMAC5@25g-aui. Reconnecting to DPMAC6@25g-aui
e1000: 00:15:17:be:d7:83

Warning: e1000#0 MAC addresses don't match:
Address in ROM is 00:15:17:be:d7:83
Address in environment is 00:e0:0c:01:02:07

Warning: e1000#0 failed to set MAC address
eth0: DPMAC2@xlaui4, eth1: DPMAC3@usxgmii, eth2: DPMAC4@usxgmii, eth3: DPMAC5@25g-aui, eth4: DPMAC6@25g-aui, eth5: DPMAC17@rgmii-id, eth6: DPMAC18@rgmii-id, eth7: e1000#0 [PRIME]
Warning: e1000#0 failed to set MAC address

SF: Detected mt35xu512aba with page size 256 Bytes, erase size 128 KiB, total 64 MiB
device 0 offset 0x640000, size 0x80000
SF: 524288 bytes @ 0x640000 Read: OK
device 0 offset 0xf00000, size 0x100000
SF: 1048576 bytes @ 0xf00000 Read: OK
device 0 offset 0xa00000, size 0x300000
SF: 3145728 bytes @ 0xa00000 Read: OK
device 0 offset 0xe00000, size 0x100000
SF: 1048576 bytes @ 0xe00000 Read: OK
crc32+
fsl-mc: Booting Management Complex ... SUCCESS
fsl-mc: Management Complex booted (version: 10.32.0, boot status: 0x1)
Hit any key to stop autoboot: 0
=>
=>

[sevseev]

Thanks, it worked!

I did not use flex-builder. I built all components manually instead, as per LSDK-21.08 user guide. I guess, I was missing something or used wrong versions of components.

Thanks again,

Serguei