LX2160ARDB DDR memory access after DDR init

[userland]

Hi

After manually initialized the DDR controllers via JTAG I'm trying to access the DDR memory area but it always fails

From what I understand the regions has to be mapped using Trust Zone Address Space Controller, so I've tried doing what u-boot from lsdk2012 did, but I still cannot access the memory region.

A rough step by step how I do it is:

Initialize DDR controller 1 & 2 -> Turn of TZC gatekeeper for each controller -> Apply memory region info ->  set action register -> enable TZC gatekeeper

But the CPU still resets when I try to access the memory region (0x80000000)

[yipingwang]

Please refer to the attached CodeWarrior initialization file.

Please refer to the following procedure.

1.  Init_TZASC()

2. Init_DDR_PHY(DDR_freq)

3. Init_DDRC(DDR_freq)

[userland]

Thank you

What exactly does Init_DDR_PHY do?

I'm trying to figure out if it accesses some device registers like TZ and DDRC does

But I guess that DDR PHY loads some kind of firmware?

Why I'm asking is because I'm trying to write a init script for Trace32, so I need to understand all the parts of the process in order to get it to work

Thanks

[yipingwang · Accepted solution]

Please refer to "class CwPhy(object)" in the attached file.

# Operations
_OPERATIONS = {
'init' : OP_INIT_CONFIG,
'load-firmware' : OP_LOAD_FIRMWARE,
'exec-firmware' : OP_EXEC_FIRMWARE,
'read-message-block' : OP_READ_MESSAGE_BLOCK,
'load-pie' : OP_LOAD_PIE,
'run-diag' : OP_RUN_DIAG
}

DDR PHY loads DDR PHY FW at offset 0x00800000 of QSPI flash.