[LS1046A] "SCFG_USBPWRFAULT_SELCR" register setting by PBI command

[charleshuang]

Hi NXP Team,

We tried to fixed the SCFG_USBPWRFAULT_SELCR register to value '0', so I added a PBI cmd in  RCW file as below. But it's seem no use ... (Always get original value by 'md 0x1570414')

Any thing wrong ???

-----------------------------------------------------------------

#include <cci_barrier_disable.rcw>
#include <usb_phy_freq.rcw>
#include <serdes_sata.rcw>
#include <a009531.rcw>

.pbi
// reset SCFG_USBPWRFAULT_SELCR
write 0x570414, 0x00000000
flush
.end

.pbi
// Alt base register
write 0x570158, 0x00001000
flush
.end

.pbi
// flush PBI data
write 0x6100c0, 0x000fffff
.end

-----------------------------------------------------------------

Best Regards,

Sean Chuang

[charleshuang]

We use LS1046A .

============== Get Reg Value =================

=> md 0x1570414 1
01570414: 29000000

============== U-boot Log =================

U-Boot 2020.04-gf26da7f1-dirty (Jan 18 2022 - 08:52:04 +0000)

SoC: LS1046AE Rev1.0 (0x87070010)
Clock Configuration:
CPU0(A72):1800 MHz CPU1(A72):1800 MHz CPU2(A72):1800 MHz
CPU3(A72):1800 MHz
Bus: 600 MHz DDR: 2100 MT/s FMAN: 700 MHz
Reset Configuration Word (RCW):
00000000: 0c150012 0e000000 00000000 00000000
00000010: 11335559 40005012 60040000 c1000000
00000020: 00000000 00000000 00000000 00238802
00000030: 20124000 00003101 00000096 00000001
Model: LS1046A RDB Board
Board: LS1046ARDB, boot from Invalid setting of SW5
CPLD: V0.0
PCBA: V0.0
SERDES Reference Clocks:
SD1_CLK1 = 100.00MHZ, SD1_CLK2 = 100.00MHZ
DRAM: 7.9 GiB (DDR4, 64-bit, CL=15, ECC off)
SEC0: RNG instantiated
Using SERDES1 Protocol: 4403 (0x1133)
Using SERDES2 Protocol: 21849 (0x5559)
NAND: 0 MiB
MMC: FSL_SDHC: 0
Loading Environment from MMC... *** Warning - bad CRC, using default environment

EEPROM: Read failed.
In: serial
Out: serial
Err: serial
TEST TEST TEST
WDT_DIRMASK_EN val (0x0)
WDT_DATMASK_EN val (0x40000000)
WDT_DIRMASK_TRIG val (0x0)
WDT_DATMASK_TRIG val (0x50000000)
Net:
MMC read: dev # 0, block # 18432, count 128 ...
Fman1: Uploading microcode version 106.4.18
PCIe1: pcie@3400000 Root Complex: no link
PCIe2: pcie@3500000 Root Complex: no link
PCIe3: pcie@3600000 Root Complex: no link
FM1@DTSEC3 [PRIME]
Error: FM1@DTSEC3 address not set.
, FM1@DTSEC4
Error: FM1@DTSEC4 address not set.
, FM1@DTSEC5
Error: FM1@DTSEC5 address not set.
, FM1@DTSEC6
Error: FM1@DTSEC6 address not set.
, FM1@TGEC1
Error: FM1@TGEC1 address not set.
, FM1@TGEC2
Error: FM1@TGEC2 address not set.

Hit any key to stop autoboot: 0
scanning bus for devices...
SATA link 0 timeout.
AHCI 0001.0301 32 slots 1 ports 6 Gbps 0x1 impl SATA mode
flags: 64bit ncq pm clo only pmp fbss pio slum part ccc apst

Device 0: unknown device
switch to partitions #0, OK
mmc0 is current device
Scanning mmc 0:1...
Scanning mmc 0:2...
Found U-Boot script /ls1046ardb_boot.scr
965 bytes read in 18 ms (51.8 KiB/s)
## Executing script at 80000000
37016064 bytes read in 1561 ms (22.6 MiB/s)
32046 bytes read in 16 ms (1.9 MiB/s)
## Flattened Device Tree blob at 90000000
Booting using the fdt blob at 0x90000000
Loading Device Tree to 000000008ffe5000, end 000000008ffffd2d ... OK
INFO: RNG Desc SUCCESS with status 0
INFO: result c7d9deb8c050dca0
WARNING failed to get smmu node: FDT_ERR_NOTFOUND
WARNING failed to get smmu node: FDT_ERR_NOTFOUND

Thanks.

Sean Chuang

[ufedor · Accepted solution]

Use a debugger to ensure that the register reset value is zero immediately after POR.

The "=> md 0x1570414 1" command shows the register value after U-Boot code execution which sets the register value according to the LS1046ARDB configuration.

[charleshuang]

I'm confused.

Did you mean PBI command can't control the LS1046ARDB configuration ?

If your answer is yes ... What should I do to ignore USB_PWRFAULT ?

Thanks

Sean Chuang

[ufedor]

> Did you mean PBI command can't control the LS1046ARDB configuration ?

Of course - NOT.

It was already written:

"The "=> md 0x1570414 1" command shows the register value after U-Boot code execution which sets the register value according to the LS1046ARDB configuration."

[charleshuang]

> Of course - NOT.

OK, I got it.

I will try to fix the config in u-boot.

Thanks

[ufedor]

> (Always get original value by 'md 0x1570414')

The register's reset value should be all zeroes.

Please provide U-Boot log in your case.

Which board is in question?