Below is the memory dump of the uart registers for 0x21c0500 (serial0), and 0x21c0600 (serial1) in uboot where I need both serial connections.
=> md.b 0x21c0500 0x11
021c0500: 00 00 c1 03 03 00 11 00 00 00 00 00 00 00 00 00 ................
021c0510: 03 .
=> md.b 0x21c0600 0x11
021c0600: 00 00 01 00 00 60 11 00 00 00 00 00 00 00 00 00 .....`..........
021c0610: 01
Why does it appear that the Latch Access Bit is set in 0x21c0503 (Line Control Register)? Also in 0x21c0502 (alternate function register) why is concurrent write set? Do I need baud clock gated off or on if I need serial0 on 115200 and serial1 on 38400? The values also don't appear to match what is suppose to show coming out of reset. Serial0 appears to be in FIFO mode, not sure if that matters. While debugging if I switch particular registers then if I write to 0x21c0600 it'll show up on 0x21c0500, which is very wrong.
Where should I look for correcting this?