LS102x: QUICC/UCC UART: Disable hardware handshake

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LS102x: QUICC/UCC UART: Disable hardware handshake

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konradgräfe
Contributor III

Hello,

I was able to activate the UCC UART on the LS1021A-TWR and it is working as expected. However, I could not figure out, how to disable hardware handshaking.

The stty tool does not work (which is not surprising since I did not see the driver handling this flag, but anyway):

root@ls1021atwr:~# stty -F /dev/ttyQE0 115200 -crtscts
root@ls1021atwr:~# echo lol > /dev/ttyQE0
ucc_uart 2402000.ucc: shutdown timeout‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍

And I could not find how that would be set on the register level. :smileyplain:

In QEIWRM_V8.pdf chapter 16.4.5 Initializing the UCCs it says 

3. Configure the parallel I/O registers to enable RTS, CTS, and CD if these signals are required.

Which implies that it should be possible to disable hardware handshaking. But I did not find what the parallel I/O registers would be for this processor.

 

Can you help me out here?

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Pavel
NXP Employee
NXP Employee

There is no possibility for disabling the RTS, CTS, and CD of the LS1021 UCC UART. Look at the Tables 3-15 and 3-16 of the LS1021a Reference Manual.

Use cable between your devices for disabling flow control. See the following page:

http://retired.beyondlogic.org/serial/serial.htm


Have a great day,
Pavel Chubakov

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Pavel
NXP Employee
NXP Employee

There is no possibility for disabling the RTS, CTS, and CD of the LS1021 UCC UART. Look at the Tables 3-15 and 3-16 of the LS1021a Reference Manual.

Use cable between your devices for disabling flow control. See the following page:

http://retired.beyondlogic.org/serial/serial.htm


Have a great day,
Pavel Chubakov

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

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konradgräfe
Contributor III

I already thought that those registers might be the pin muxing registers on other CPUs but had some hope that I am wrong. :smileysad:

Thank you for your quick response, though.

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