LS1028A ethernet Clock (EC1_GTX_CLK125) rise/fall requirements.

[williamweishaup]

Table 12 EC_GTX_CLK125 AC timing specifications in the QorIQ LS1028A/LS1018A Data Sheet Rev. 0 Dec 2019 states max rise and fall time of 0.75 ns.  Following are my questions regarding this requirement:

1) Does this mean the input to this clock must rise or fall within 0.75 ns or does it mean the input cannot have a rise or fall time faster than 0.75 ns? Since this input appears to be a CMOS single ended input, I am having a difficult time finding a 125MHz oscillator that can meet this requirement. 

2) Is this requirement correct?

3) Do you have any suggestions of oscillators that meet these requirements.

[Oswalag]

Hello,

RGMII specifications requires clocks with 45-55% duty cycle and 0.75ns rise/fall time.
EC_GTX_CLK125 is used to generate GTX clock with 2% degradation.
In fact, if a specific PHY device can tolerate more relaxed timings then EC_GTX_CLK125 parameters can be relaxed as well.
However, it is rather a question to PHY manufacturer.