LS1028 MSI Capability does not have Mask Bits and Pending Bits?

[xinliwang]

Hi. 

I am working with a custom FPGA PCI Express endpoint connected to an LS1028. I wanna use pcie MSI but by checking the register of MSI, I couldn't find Mask Bits and Pending Bits. 

Here is the nomal structure of MSI Capability

but for the Message Control register of LS1028 MSI I couldn't find per-vector pending bits:

So,  as the interrupt comes, How could I set the Pending bits for MSI interrupts?

[yipingwang]

Mask and Pending bits of MSI is supported by EP.
LS1028A does not support Mask and pending bits in its MSI capability structure.
Customer's setup: LS1028A is configured as RC and EP has the capability to send MSI.

EP will have to send an inbound memory write to RC.
Message based interrupt comes under the category of LPI interrupts in the GIC controller.
GIC will write data in the specified address as per the inbound TLP memory write received
and based on that LPI interrupt will be generated to the core