LS1021A-IOT: PCIe device sometimes fails to scan after warm reset

[jean-francoisri]

We are working with an Atheros Radio AR9580 mounted in PCIe1. After a power-on reset, everything seems to work fine, and U-Boot is showing:

CPU:   Freescale LayerScape LS1021E, Version: 2.0, (0x87081120)
Clock Configuration:
       CPU0(ARMV7):1000 MHz,
       Bus:300  MHz, DDR:800  MHz (1600 MT/s data rate),
Reset Configuration Word (RCW):
       00000000: 0608000a 00000000 00000000 00000000
       00000010: 20000000 08407900 60025a00 21046000
       00000020: 00000000 00000000 00000000 20038000
       00000030: 20024800 881b1340 00000000 00000000
Board: LS1021AIOT
CPLD:  V2.3
I2C:   ready
DRAM:  1023.5 MiB
Using SERDES1 Protocol: 32 (0x20)
MMC:   FSL_SDHC: 0
EEPROM: NXID v1
PCIe1: Root Complex x1 gen1, regs @ 0x3400000
     01:00.0    - 168c:0033 - Network controller
PCIe1: Bus 00 - 01
PCIe2: Root Complex no link, regs @ 0x3500000
(...some U-Boot output removed...)
=> pci 0
Scanning PCI devices on bus 0
BusDevFun  VendorId   DeviceId   Device Class       Sub-Class
_____________________________________________________________
00.00.00   0x1957     0x0e0a     Bridge device           0x04
=> pci 1
Scanning PCI devices on bus 1
BusDevFun  VendorId   DeviceId   Device Class       Sub-Class
_____________________________________________________________
01.00.00   0x168c     0x0033     Network controller      0x80

However, each time I perform a warm reset from the U-Boot command line (i.e. "reset" command), there is a chance that the radio device is no longer recognized:

PCIe1: Root Complex x1 gen1, regs @ 0x3400000
  PCIe1: Bus 00 - 01
PCIe2: Root Complex no link, regs @ 0x3500000
(...some U-Boot output removed...)
=> pci 0
Scanning PCI devices on bus 0
BusDevFun  VendorId   DeviceId   Device Class       Sub-Class
_____________________________________________________________
00.00.00   0x1957     0x0e0a     Bridge device           0x04
=> pci 1
Scanning PCI devices on bus 1
BusDevFun  VendorId   DeviceId   Device Class       Sub-Class
_____________________________________________________________
(...nothing is shown...)

I'm not sure what is happening here:

• Missing PCIe bridge configuration?
• Missing explicit radio reset? If so, how can I do this?

However I need to fix this, because warm resets will happen in the field and there will not be anyone to power-cycle the device.

[jeffsteinheider]

This was resolved with a new 2.6 version of the firmware for the CPLD on the LS1021A-IOT board.

[jean-francoisri]

I have more information about the problem. When using the same radio PCIe board on a LS1021A-TWR, it always scans successfully after a warm reset. So I would assume it is either:

1. a hardware issue specific to the IOT version of the board; or
2. missing configuration code in the IOT version of U-Boot.

I'm currently leaning towards (b) since the TWR flavor of U-Boot seems to be much more supported, than the IOT. Can anyone shed some light on this issue?