Thanks for the link. But it raised more questions :-).
New files are named V2.0 and the CPLD code states it is intended for PB Rev.B, but the accompanied schematics and brd files from the zip file exactly equal to those ones in the zip file with cpld V1.1 code, which I have (CPLD-TWR-LS1021A-PB_V1.1.zip). I have the TWR-LS1021A_Schematic_SPF-28673_B.pdf document.
I checked ints for ethernet interfaces and in the v1.1 CPLD code, these are even unused in the code, i.e. they are not handled. Does it mean the Linux driver for ethernet PHYs worked in a polled mode?
With CPLD V2.0, there is some handling with sleep mode and these ints are blocked by the evt9_board_iso signal (see CPLD code snippet below). But I am unable to find this signal in the ..._B board schematics.
Also the gate_3_3V signal was not handled in the V1.1 CPLD code. Is my schematics file the most recent one?
However browsing through schematics and CPLD code gives results, my question is: Is there a document, describing CPLD goals, maybe also IC consumption and individual power source requirements for the Tower board?
assign soc_irq0 = (deep_sleep_en && (~evt9_board_iso))? 1'b1 :
sgmii1_phy_int_n_18 && sgmii2_phy_int_n_18 && rgmii_phy_int_n_18;
assign soc_irq1 = (deep_sleep_en && (~evt9_board_iso))? 1'b1 :
pmic_int_b && hdmi_det;
