LS1012A OCRAM Access

[Gyosun]

Hello.

I am using the LS1012A custom board and currently using LSDK1812.
I would like to use OCRAM, but when I try to read it with devmem,
it seems that I don't have the access permission.
I would appreciate it if you could let me know what I should do to read and write to it.

[root@LS1012A ~]# devmem 0x10000000
[  238.273220] Unhandled fault: synchronous external abort (0x92000210) at 0x0000ffff920f1000
Bus error
[root@LS1012A ~]#

Thank you.
Best regards.
Gyosun.

[khushbur]

Hi @Gyosun 

I hope you are doing well.

OCRAM should not be accessed from user space.

It is restricted to Secure World access only by the CSU.

Please refer to Chapter 7 CSU, OCRAM, and MSCM in LS1012ARM

One can look into ATF for OCRAM access.

/plat/nxp/soc-ls1012a/include/ns_access.h

{CSU_CSLX_OCRAM, CSU_S_SUP_RW},

here,ocram access is not given to userspace

Thanks

Khushbu

[Gyosun]

Hi Khushbu,

Thank you for your response.

If you could please provide an example of using devmem to set access permissions for CSU OCRAM and read/write to OCRAM, I would greatly appreciate it.

In addition, I tried the following in u-boot, but the CSU_CSL register is not changed.

=> md.l 1510000 8
01510000: ff00ff00 ff00ff00 ff002200 2200ff00 ........."....."
01510010: ff00ff00 ff00ff00 3300ff00 33003300 ...........3.3.3
=> mw.l 1510008 22002200
=> md.l 1510000 8
01510000: ff00ff00 ff00ff00 ff002200 2200ff00 ........."....."
01510010: ff00ff00 ff00ff00 3300ff00 33003300 ...........3.3.3
=> md.l 10000000 8
10000000:"Synchronous Abort" handler, esr 0x96000210
elr: 0000000082058a2c lr : 00000000820589a8 (reloc)
elr: 0000000097ba7a2c lr : 0000000097ba79a8
x0 : 0000000000000009 x1 : 000000000000003a
x2 : 0000000000000020 x3 : 0000000010000000
x4 : 0000000000000000 x5 : 0000000097bbccdd
x6 : 0000000000000004 x7 : 000000000000000f
x8 : 00000000ffffffd0 x9 : 0000000000000008
x10: 0000000000000010 x11: 0000000000000006
x12: 000000000001869f x13: 0000000000000c10
x14: 0000000097b0ceac x15: 0000000000000008
x16: 0000000000000000 x17: 0000000000000000
x18: 0000000097b0ed80 x19: 0000000000000008
x20: 0000000010000000 x21: 0000000010000000
x22: 0000000097bbb778 x23: 0000000000000008
x24: 0000000000000004 x25: 0000000000000004
x26: 0000000000000004 x27: 0000000097b0ccb8
x28: 0000000000000000 x29: 0000000097b0cc30

Resetting CPU ...

### ERROR ### Please RESET the board ###

Thanks,
Gyosun.

[khushbur]

Hi @Gyosun 

Please refer ATF code for OCRAM access.

/plat/nxp/soc-ls1012a/include/ns_access.h

{CSU_CSLX_OCRAM, CSU_S_SUP_RW},

https://github.com/nxp-qoriq/atf/blob/lf_v2.6/plat/nxp/soc-ls1012a/soc.c

enable_layerscape_ns_access(ns_dev, ARRAY_SIZE(ns_dev), NXP_CSU_ADDR);

Thanks

Khushbu

[Gyosun]

Hi khushbur,

The code to enable OCRAM was simply written by referring to the code as follows.

void mmap_init(uint8_t **pp_vaddr, uint64_t baddr, uint32_t size)
{
  int fd;
  fd = open("/dev/mem", O_RDWR | O_SYNC);
  *pp_vaddr = (uint8_t *)mmap64(NULL, size, PROT_READ | PROT_WRITE, MAP_SHARED, fd, baddr);
  close(fd);
}

void enable_layerscape_ns_access(void)
{
#define CSU_CSLX_OCRAM (4)
#define CSU_S_SUP_RW (0x22U)

  uint32_t *base;
  uint32_t *reg;
  uint32_t val;
  printf("%s\n", __func__);
  mmap_init((uint8_t **)&base, 0x01510000, 0x1000);

  reg = base + CSU_CSLX_OCRAM / 2U;
  val = be32toh(*(volatile uint32_t*)((uintptr_t)reg));
  if (CSU_CSLX_OCRAM % 2U == 0U) {
    val &= 0x0000ffffU;
    val |= CSU_S_SUP_RW << 16U;
  } else {
    val &= 0xffff0000U;
    val |= CSU_S_SUP_RW;
  }
  *(volatile uint32_t*)(uintptr_t)reg = htobe32(val);
}

However, when reading the value with devmem, the value is not reflected.

[root@LS1012A ]# devmem 0x1510008
0xFF002200
[root@LS1012A ]# ./test
enable_layerscape_ns_access
[root@LS1012A ]# devmem 0x1510008
0xFF002200
[root@LS1012A ]#

What more do we need to do?

Thanks,

Gyosun.

[khushbur]

Hi @Gyosun 

You can not update CSU from linux user space.

Please refer ATF code for OCRAM access.

/plat/nxp/soc-ls1012a/include/ns_access.h

{CSU_CSLX_OCRAM, CSU_S_SUP_RW}

Thanks

Khushbu